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CD4536BPW

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Texas Instruments Timers / Counters, TSSOP-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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CD4536BPW

Texas Instruments · Timers / Counters · TSSOP-16

CD4536BPW from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SET input Active-high set input; forces all 24 counter flip-flop stages to logic-1 state; overrides RESET; input protected by CMOS protection network.
2 RESET input Active-high reset input; clears all counter stages to logic-0 (all-zeros state); overrides clock and SET; input protected by CMOS protection network.
3 OUT2 output On-chip RC oscillator timing node 2; output of the internal inverter chain used with external timing components CT and RT; frequency f ≈ 1/(3·RT·CT).
4 OUT1 output On-chip RC oscillator timing node 1; output of the internal ring oscillator; connect external timing capacitor CT between this pin and VSS.
5 IN1 input On-chip RC oscillator input; connect series timing resistor RS (RS ≈ 5-10×RT) from this pin to the RC network; also serves as external clock input when OSC INH is high; input protected by CMOS protection network.
6 8-BYPASS input Active-high bypass input; when high, bypasses the first 8 counter stages so the counter operates as a 16-stage counter through stages 9-24; input protected by CMOS protection network.
7 CLOCK_INH input Active-high clock inhibit input; when high, prevents clock pulses from advancing the counter; input protected by CMOS protection network.
8 VSS power_in Negative supply voltage (ground) reference terminal; 0 V.
9 A input Decode-select address bit A (bit 0, LSB) of the 4-bit BCD input; selects which counter stage (2-24) drives the DECODE OUT terminal per the Decode-Out Selection Table.
10 B input Decode-select address bit B (bit 1) of the 4-bit BCD input; selects which counter stage drives the DECODE OUT terminal per the Decode-Out Selection Table.
11 C input Decode-select address bit C (bit 2) of the 4-bit BCD input; selects which counter stage drives the DECODE OUT terminal per the Decode-Out Selection Table.
12 D input Decode-select address bit D (bit 3, MSB) of the 4-bit BCD input; selects which counter stage drives the DECODE OUT terminal; D=1 selects stages 18-24 in normal mode.
13 MONO_IN input Monostable mode input; when logic-1, enables one-shot operation so the counter automatically resets to all-0 immediately after DECODE OUT goes high.
14 OSC_INH input Oscillator inhibit input; when high, disables the on-chip RC oscillator and routes the external clock signal at IN 1 to the counter; input protected by CMOS protection network.
15 DECODE_OUT output Programmable counter decode output; goes high for one clock period when the counter reaches the stage selected by D, C, B, A; in monostable mode, generates a single pulse and triggers counter reset.
16 VDD power_in Positive supply voltage terminal; operating range 3 V to 18 V, absolute maximum 20 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Clock/Timing
Pins 16

CAD (KiCad official)

  • Symbol: CD4536BPW
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: cd4536bpw-etched.step / cd4536bpw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4536bpw.step / cd4536bpw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 a341c156ea46ab0f, retrieved 2026-10-20, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF