Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗

Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗

Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗

Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗

Loads on click. Unloads only if this page sits in the background.

Download PDF

Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

CD4536BDWR

Texas Instruments · Timers / Counters · SOIC-16-300mil

CD4536BDWR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SET	input	Active-high synchronous set input; resets all 24 counter flip-flops to logic 1 on the next clock edge to initiate a new timing cycle.
2	RESET	input	Active-high asynchronous reset input; clears all counter flip-flops to logic 0 and holds the counter in reset while HIGH.
3	IN1	input	On-chip RC oscillator input terminal; external RS (≈5-10× RT) connects between OUT2 and this pin; oscillator frequency f ≈ 1/(3RT·CT).
4	OUT1	output	RC oscillator output terminal 1; provides the buffered oscillator clock signal to the programmable counter stages.
5	OUT2	output	RC oscillator output terminal 2; external RT-CT timing network connects here to set the oscillator frequency.
6	8-BYPASS	input	Active-high bypass input; when HIGH, bypasses the first 8 counter stages so only stages 9-24 are active (see Decode Out Selection Table).
7	CLOCK_INH	input	Active-high clock inhibit input; when HIGH, prevents the clock from advancing the counter.
8	VSS	power_in	Negative supply rail (ground reference); VSS = 0 V.
9	A	input	BCD decode-output-select bit A (LSB); with B, C, D forms a 4-bit code selecting one of 16 counter-stage outputs to drive DECODE OUT.
10	B	input	BCD decode-output-select bit B; combined with A, C, D to program the count at which DECODE OUT goes HIGH.
11	C	input	BCD decode-output-select bit C; combined with A, B, D to program the count at which DECODE OUT goes HIGH.
12	D	input	BCD decode-output-select bit D (MSB); with A, B, C selects one of 16 programmable count stages for the DECODE OUT terminal.
13	MONO_IN	input	Monostable input; an external resistor (VDD to this pin) and capacitor (this pin to VSS) set the DECODE OUT pulse width in monostable mode.
14	OSC_INH	input	Active-high oscillator inhibit input; when HIGH, disables the on-chip RC oscillator.
15	DECODE_OUT	output	Programmable active-high decode output; goes HIGH when the counter reaches the stage selected by A-D; pulse width is set by the MONO_IN RC network in monostable mode.
16	VDD	power_in	Positive supply voltage; recommended operating range 3 V to 18 V (absolute maximum 20 V); quiescent device current max 20 µA at VDD = 18 V.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-16-300mil
Category	Clock/Timing
Pins	16

CAD (KiCad official)

Symbol: CD4536BDWR
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16-300mil (KiCad packages3D, STEP)
3D model files: cd4536bdwr-etched.step / cd4536bdwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4536bdwr.step / cd4536bdwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (26 pp, sha256 bbfd5603d8d971d6, retrieved 2026-09-29, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF