# CD4527BPWR

**Texas Instruments** · Specialty Logic · TSSOP-16

CD4527BPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | "9" OUT | output | "9" output, which goes low when the counter is at the 9 state (low with the CLEAR and SET truth table entries shown) and is high otherwise. |
| 2 | C | input | BCD rate-select input C, with input voltage limited to -0.5 V to VDD+0.5 V. |
| 3 | D | input | BCD rate-select input D, with input voltage limited to -0.5 V to VDD+0.5 V. |
| 4 | SET TO "9" | input | Set-to-"9" input that presets the counter to 9 when high and must not be high at the same time as CLEAR. |
| 5 | OUT (inverted) | output | Complementary rate-multiplier output pulse train (OUT-bar), the inverse of the OUT pin 6 output. |
| 6 | OUT | output | Rate-multiplier output delivering output pulses at a rate set by the BCD inputs, e.g. 8 pulses for every 10 clock pulses when BCD input is 8. |
| 7 | INHIBIT OUT (CARRY) | output | Inhibit (carry) output used to cascade devices, which goes low on the clear-state truth table entries and is high in normal counting. |
| 8 | VSS | power_in | Negative supply/ground terminal, the reference for the DC supply voltage range of -0.5 V to +20 V. |
| 9 | CLOCK | input | Clock input, with a maximum clock frequency of 1.2 MHz at VDD = 5 V. |
| 10 | STROBE | input | Strobe input which, when high, holds the OUT output according to the truth table and is used in cascading devices. |
| 11 | INHIBIT IN (CARRY) | input | Inhibit (carry) input used to cascade devices, which inhibits the outputs when high. |
| 12 | CASCADE | input | Cascade input used to select the Add or Multiply mode when connecting two devices. |
| 13 | CLEAR | input | Clear input that resets the counter when high and must not be high at the same time as SET TO "9". |
| 14 | A | input | BCD rate-select input A, with input voltage limited to -0.5 V to VDD+0.5 V. |
| 15 | B | input | BCD rate-select input B, with input voltage limited to -0.5 V to VDD+0.5 V. |
| 16 | VDD | power_in | Positive supply voltage with a recommended range of 3 V to 18 V and an absolute maximum of +20 V referenced to VSS. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `CD4527BPWR`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `cd4527bpwr-etched.step` / `cd4527bpwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4527bpwr.step` / `cd4527bpwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd4527b.pdf) (18 pp, sha256 `3f7a8589572c05a5`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cd4527bpwr-datasheet.pdf)