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CD4520BM96
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Texas Instruments Counters, Dividers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# CD4520BM96++**Texas Instruments** · Counters, Dividers · SOIC-16++CD4520BM96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CLOCK A | input | Clock input for counter section A; counts advance on the selected clock edge (positive- or negative-going, set via internal exclusive-OR with ENABLE A) while RESET A is low. |+| 2 | ENABLE A | input | Enable input for counter section A; held high for single-unit operation so the counter advances on the positive-going CLOCK A transition, or used with CLOCK A for edge-select/cascading (e.g., driven by Q4 of a preceding stage for ripple cascading). |+| 3 | Q1A | output | Bit 1 (LSB) output of the 4-stage binary counter section A. |+| 4 | Q2A | output | Bit 2 output of the 4-stage binary counter section A. |+| 5 | Q3A | output | Bit 3 output of the 4-stage binary counter section A. |+| 6 | Q4A | output | Bit 4 (MSB) output of the 4-stage binary counter section A; can drive ENABLE B of a subsequent stage for ripple cascading. |+| 7 | RESET A | input | Asynchronous reset input for counter section A; a high level clears outputs Q1A-Q4A to 0 regardless of CLOCK A or ENABLE A state. |+| 8 | VSS | power_in | Negative supply / ground reference terminal for the device (0 V, referenced by VDD range -0.5 V to +20 V). |+| 9 | CLOCK B | input | Clock input for counter section B; counts advance on the selected clock edge while RESET B is low, identical function to CLOCK A. |+| 10 | ENABLE B | input | Enable input for counter section B; held high for single-unit operation so the counter advances on the positive-going CLOCK B transition, or used for edge-select/cascading. |+| 11 | Q1B | output | Bit 1 (LSB) output of the 4-stage binary counter section B. |+| 12 | Q2B | output | Bit 2 output of the 4-stage binary counter section B. |+| 13 | Q3B | output | Bit 3 output of the 4-stage binary counter section B. |+| 14 | Q4B | output | Bit 4 (MSB) output of the 4-stage binary counter section B. |+| 15 | RESET B | input | Asynchronous reset input for counter section B; a high level clears outputs Q1B-Q4B to 0 regardless of CLOCK B or ENABLE B state. |+| 16 | VDD | power_in | Positive supply voltage terminal, referenced to VSS; absolute maximum rating -0.5 V to +20 V, recommended operating range 3 V to 18 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD4520BM96`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `cd4520bm96-etched.step` / `cd4520bm96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4520bm96.step` / `cd4520bm96.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd4520b) (21 pp, sha256 `c28162391ada6d6a`, retrieved 2026-09-24, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-sonnet-5` (vision), consensus `claude-opus-4-8` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4520bm96-datasheet.pdf)
page.jsonadded+191@@ -0,0 +1,191 @@+{+ "slug": "cd4520bm96",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Counters, Dividers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd4520bm96",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd4520bm96.kicad_sym",+ "cd4520bm96.kicad_mod",+ "cd4520bm96.glb",+ "cd4520bm96.step",+ "cd4520bm96.lbr",+ "docs/hero.png",+ "docs/cd4520bm96-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "CD4520BM96",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Counters, Dividers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cd4520b",+ "parts": {+ "symbol": "cd4520bm96.kicad_sym",+ "footprint": "cd4520bm96.kicad_mod",+ "model_3d": "cd4520bm96-etched.glb",+ "model_3d_plain": "cd4520bm96.glb",+ "model_3d_step": "cd4520bm96-etched.step",+ "model_3d_step_plain": "cd4520bm96.step",+ "lbr": "cd4520bm96.lbr"+ },+ "distributor_links": {+ "lcsc": "C2653014"+ },+ "pins": [+ {+ "number": "1",+ "name": "CLOCK A",+ "type": "input",+ "description": "Clock input for counter section A; counts advance on the selected clock edge (positive- or negative-going, set via internal exclusive-OR with ENABLE A) while RESET A is low."+ },+ {+ "number": "2",+ "name": "ENABLE A",+ "type": "input",+ "description": "Enable input for counter section A; held high for single-unit operation so the counter advances on the positive-going CLOCK A transition, or used with CLOCK A for edge-select/cascading (e.g., driven by Q4 of a preceding stage for ripple cascading)."+ },+ {+ "number": "3",+ "name": "Q1A",+ "type": "output",+ "description": "Bit 1 (LSB) output of the 4-stage binary counter section A."+ },+ {+ "number": "4",+ "name": "Q2A",+ "type": "output",+ "description": "Bit 2 output of the 4-stage binary counter section A."+ },+ {+ "number": "5",+ "name": "Q3A",+ "type": "output",+ "description": "Bit 3 output of the 4-stage binary counter section A."+ },+ {+ "number": "6",+ "name": "Q4A",+ "type": "output",+ "description": "Bit 4 (MSB) output of the 4-stage binary counter section A; can drive ENABLE B of a subsequent stage for ripple cascading."+ },+ {+ "number": "7",+ "name": "RESET A",+ "type": "input",+ "description": "Asynchronous reset input for counter section A; a high level clears outputs Q1A-Q4A to 0 regardless of CLOCK A or ENABLE A state."+ },+ {+ "number": "8",+ "name": "VSS",+ "type": "power_in",+ "description": "Negative supply / ground reference terminal for the device (0 V, referenced by VDD range -0.5 V to +20 V)."+ },+ {+ "number": "9",+ "name": "CLOCK B",+ "type": "input",+ "description": "Clock input for counter section B; counts advance on the selected clock edge while RESET B is low, identical function to CLOCK A."+ },+ {+ "number": "10",+ "name": "ENABLE B",+ "type": "input",+ "description": "Enable input for counter section B; held high for single-unit operation so the counter advances on the positive-going CLOCK B transition, or used for edge-select/cascading."+ },+ {+ "number": "11",+ "name": "Q1B",+ "type": "output",+ "description": "Bit 1 (LSB) output of the 4-stage binary counter section B."+ },+ {+ "number": "12",+ "name": "Q2B",+ "type": "output",+ "description": "Bit 2 output of the 4-stage binary counter section B."+ },+ {+ "number": "13",+ "name": "Q3B",+ "type": "output",+ "description": "Bit 3 output of the 4-stage binary counter section B."+ },+ {+ "number": "14",+ "name": "Q4B",+ "type": "output",+ "description": "Bit 4 (MSB) output of the 4-stage binary counter section B."+ },+ {+ "number": "15",+ "name": "RESET B",+ "type": "input",+ "description": "Asynchronous reset input for counter section B; a high level clears outputs Q1B-Q4B to 0 regardless of CLOCK B or ENABLE B state."+ },+ {+ "number": "16",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply voltage terminal, referenced to VSS; absolute maximum rating -0.5 V to +20 V, recommended operating range 3 V to 18 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-sonnet-5",+ "primary_mode": "vision",+ "consensus_model": "claude-opus-4-8",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 12,+ "cost_usd": 0.4797,+ "at": "2026-09-24T09:00:19"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cd4520b",+ "pages": 21,+ "sha256": "c28162391ada6d6a",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}