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CD4520BM96
Public Made by Adomby adom
Texas Instruments Counters, Dividers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4520BM96
Texas Instruments · Counters, Dividers · SOIC-16
CD4520BM96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLOCK A | input | Clock input for counter section A; counts advance on the selected clock edge (positive- or negative-going, set via internal exclusive-OR with ENABLE A) while RESET A is low. |
| 2 | ENABLE A | input | Enable input for counter section A; held high for single-unit operation so the counter advances on the positive-going CLOCK A transition, or used with CLOCK A for edge-select/cascading (e.g., driven by Q4 of a preceding stage for ripple cascading). |
| 3 | Q1A | output | Bit 1 (LSB) output of the 4-stage binary counter section A. |
| 4 | Q2A | output | Bit 2 output of the 4-stage binary counter section A. |
| 5 | Q3A | output | Bit 3 output of the 4-stage binary counter section A. |
| 6 | Q4A | output | Bit 4 (MSB) output of the 4-stage binary counter section A; can drive ENABLE B of a subsequent stage for ripple cascading. |
| 7 | RESET A | input | Asynchronous reset input for counter section A; a high level clears outputs Q1A-Q4A to 0 regardless of CLOCK A or ENABLE A state. |
| 8 | VSS | power_in | Negative supply / ground reference terminal for the device (0 V, referenced by VDD range -0.5 V to +20 V). |
| 9 | CLOCK B | input | Clock input for counter section B; counts advance on the selected clock edge while RESET B is low, identical function to CLOCK A. |
| 10 | ENABLE B | input | Enable input for counter section B; held high for single-unit operation so the counter advances on the positive-going CLOCK B transition, or used for edge-select/cascading. |
| 11 | Q1B | output | Bit 1 (LSB) output of the 4-stage binary counter section B. |
| 12 | Q2B | output | Bit 2 output of the 4-stage binary counter section B. |
| 13 | Q3B | output | Bit 3 output of the 4-stage binary counter section B. |
| 14 | Q4B | output | Bit 4 (MSB) output of the 4-stage binary counter section B. |
| 15 | RESET B | input | Asynchronous reset input for counter section B; a high level clears outputs Q1B-Q4B to 0 regardless of CLOCK B or ENABLE B state. |
| 16 | VDD | power_in | Positive supply voltage terminal, referenced to VSS; absolute maximum rating -0.5 V to +20 V, recommended operating range 3 V to 18 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD4520BM96 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
cd4520bm96-etched.step/cd4520bm96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4520bm96.step/cd4520bm96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
c28162391ada6d6a, retrieved 2026-09-24, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-sonnet-5(vision), consensusclaude-opus-4-8(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).