main
Ray cd4520b: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 898e17c 27d ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "cd4520b",
  "title": "CD4520B",
  "brief": "TI dual 4-bit synchronous binary up counter, SOIC-16. Two counters, clock/enable + reset each. CMOS 3-18 V. Datasheet-verified.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "counter",
    "binary-counter",
    "4520",
    "soic-16",
    "texas-instruments"
  ],
  "component": {
    "mpn": "CD4520B",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Logic IC",
    "subcategory": "Dual 4-bit binary counter",
    "datasheet": "https://www.ti.com/lit/ds/symlink/cd4520b.pdf",
    "parts": {
      "symbol": "cd4520b.kicad_sym",
      "footprint": "cd4520b.kicad_mod",
      "model_3d": "cd4520b-etched.glb",
      "model_3d_plain": "cd4520b.glb",
      "lbr": "cd4520b.lbr",
      "model_3d_step": "cd4520b-etched.step",
      "model_3d_step_plain": "cd4520b.step"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "CLOCK A",
        "type": "input",
        "description": "Clock input for counter A. Counter A increments on the positive-going clock edge when ENABLE A is high, or on the negative-going enable edge when CLOCK A is held high. Minimum pulse width 200 ns @ 5 V, 100 ns @ 10 V, 70 ns @ 15 V."
      },
      {
        "number": "2",
        "name": "ENABLE A",
        "type": "input",
        "description": "Enable input for counter A. Held high for positive-edge triggering by CLOCK A, or driven low-going for negative-edge triggering while CLOCK A is high. Minimum pulse width 400 ns @ 5 V, 200 ns @ 10 V, 140 ns @ 15 V."
      },
      {
        "number": "3",
        "name": "Q1A",
        "type": "output",
        "description": "Counter A binary output bit 0 (LSB). Toggles once per counter increment; drives standard CMOS logic loads (IOL 0.51 mA @ VDD=5 V, VOL≤0.05 V)."
      },
      {
        "number": "4",
        "name": "Q2A",
        "type": "output",
        "description": "Counter A binary output bit 1. Toggles at half the Q1A rate in normal binary counting sequence."
      },
      {
        "number": "5",
        "name": "Q3A",
        "type": "output",
        "description": "Counter A binary output bit 2. Toggles at one-quarter the Q1A rate in normal binary counting sequence."
      },
      {
        "number": "6",
        "name": "Q4A",
        "type": "output",
        "description": "Counter A binary output bit 3 (MSB). Used as the ripple-carry source when cascading counter A into the ENABLE or CLOCK input of the next counter stage."
      },
      {
        "number": "7",
        "name": "RESET A",
        "type": "input",
        "description": "Asynchronous master reset for counter A. Active-high level input; a logic-high forces Q1A-Q4A to 0. Minimum reset pulse width 250 ns @ 5 V, 110 ns @ 10 V, 80 ns @ 15 V."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply / ground reference. All voltages in the datasheet are referenced to this pin."
      },
      {
        "number": "9",
        "name": "CLOCK B",
        "type": "input",
        "description": "Clock input for counter B. Same triggering rules and pulse-width limits as CLOCK A (positive edge with ENABLE B high, or negative-edge on ENABLE B with CLOCK B held high)."
      },
      {
        "number": "10",
        "name": "ENABLE B",
        "type": "input",
        "description": "Enable input for counter B. Held high for positive-edge triggering by CLOCK B, or driven low-going for negative-edge triggering while CLOCK B is high."
      },
      {
        "number": "11",
        "name": "Q1B",
        "type": "output",
        "description": "Counter B binary output bit 0 (LSB). Toggles once per counter B increment."
      },
      {
        "number": "12",
        "name": "Q2B",
        "type": "output",
        "description": "Counter B binary output bit 1. Toggles at half the Q1B rate."
      },
      {
        "number": "13",
        "name": "Q3B",
        "type": "output",
        "description": "Counter B binary output bit 2. Toggles at one-quarter the Q1B rate."
      },
      {
        "number": "14",
        "name": "Q4B",
        "type": "output",
        "description": "Counter B binary output bit 3 (MSB). Ripple-carry source when cascading counter B into another counter stage."
      },
      {
        "number": "15",
        "name": "RESET B",
        "type": "input",
        "description": "Asynchronous master reset for counter B. Active-high level input; a logic-high forces Q1B-Q4B to 0."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply pin. Operating range 3-18 V (absolute maximum 20 V referenced to VSS). Bypass with a local 0.1 µF ceramic to VSS."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/cd4520b.pdf",
        "pages": 21,
        "sha256": "5a70590c9c8683e3",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "CD4520",
      "logic_family": "CD4000",
      "function_code": "4520",
      "function_class": null,
      "function_name": null,
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "cd4520b.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4520b-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "b39ff41d12a0e24f1bdebc2ff0f0a93cf07abd492f5c8af2c1c5a13f9e5345f9",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Type": "Dual 4-bit synchronous binary counter",
      "Counters": "2 independent (0-15 each)",
      "Outputs": "Q0-Q3 per counter",
      "Clocking": "clock + enable (either edge)",
      "Reset": "active-high per counter",
      "Logic family": "4000B CMOS",
      "Supply voltage": "3-18 V",
      "Package": "SOIC-16"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cd4520b",
    "cd4520",
    "dual binary counter",
    "4-bit up counter",
    "synchronous counter"
  ],
  "discovery_pitch": "CD4520B dual 4-bit synchronous binary up counter (SOIC-16) with datasheet-verified pinout, KiCad symbol/footprint/3D, and full provenance.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4520b.kicad_sym",
    "cd4520b.kicad_mod",
    "cd4520b.glb",
    "cd4520b.lbr",
    "docs/hero.png",
    "docs/cd4520b-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cd4520b-etched.step"
  ],
  "variants": [
    {
      "mpn": "CD4520BM (SOIC-16, tube)",
      "kind": "packaging"
    },
    {
      "mpn": "CD4520BM96 (SOIC-16, tape & reel)",
      "kind": "packaging"
    }
  ]
}