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CD4518BM96
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Texas Instruments Counters, Dividers, SOIC-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# CD4518BM96++**Texas Instruments** · Counters, Dividers · SOIC-16++CD4518BM96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CLKA | input | Clock input for counter A; counter increments on positive CLKA edge when ENABLEA is high, or on negative ENABLEA edge when CLKA is high; max f_CL 3 MHz typ / 6 MHz max at VDD=10 V. |+| 2 | ENABLEA | input | Active-high enable input for counter A; when high, counter increments on positive CLKA edge; when low and CLKA is high, counter increments on falling ENABLEA edge. |+| 3 | Q1A | output | BCD decade counter output Q1 (weight 1, LSB) of counter A; active high, propagation delay 115 ns typ at VDD=10 V. |+| 4 | Q2A | output | BCD decade counter output Q2 (weight 2) of counter A; active high. |+| 5 | Q3A | output | BCD decade counter output Q3 (weight 4) of counter A; active high. |+| 6 | Q4A | output | BCD decade counter output Q4 (weight 8, MSB) of counter A; active high. |+| 7 | RESETA | input | Active-high asynchronous reset input for counter A; forces Q1A-Q4A to logic 0 regardless of clock state; reset pulse width min 55 ns at VDD=10 V. |+| 8 | VSS | power_in | Negative supply voltage (ground) reference; 0 V, lower rail of VDD=3 V to 18 V supply. |+| 9 | CLKB | input | Clock input for counter B; same function as CLKA; counter increments on positive CLKB edge when ENABLEB is high, or on negative ENABLEB edge when CLKB is high. |+| 10 | ENABLEB | input | Active-high enable input for counter B; same function as ENABLEA for the second independent BCD counter section. |+| 11 | Q1B | output | BCD decade counter output Q1 (weight 1, LSB) of counter B; active high. |+| 12 | Q2B | output | BCD decade counter output Q2 (weight 2) of counter B; active high. |+| 13 | Q3B | output | BCD decade counter output Q3 (weight 4) of counter B; active high. |+| 14 | Q4B | output | BCD decade counter output Q4 (weight 8, MSB) of counter B; active high. |+| 15 | RESETB | input | Active-high asynchronous reset input for counter B; forces Q1B-Q4B to logic 0 regardless of clock state; reset pulse width min 55 ns at VDD=10 V. |+| 16 | VDD | power_in | Positive supply voltage; operating range 3 V to 18 V (full package temperature range); absolute maximum 20 V (VDD-VSS). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD4518BM96`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `cd4518bm96-etched.step` / `cd4518bm96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4518bm96.step` / `cd4518bm96.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd4520b) (21 pp, sha256 `c28162391ada6d6a`, retrieved 2026-09-29, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4518bm96-datasheet.pdf)
page.jsonadded+190@@ -0,0 +1,190 @@+{+ "slug": "cd4518bm96",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Counters, Dividers, SOIC-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd4518bm96",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd4518bm96.kicad_sym",+ "cd4518bm96.kicad_mod",+ "cd4518bm96.glb",+ "cd4518bm96.step",+ "cd4518bm96.lbr",+ "docs/hero.png",+ "docs/cd4518bm96-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "CD4518BM96",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Counters, Dividers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cd4520b",+ "parts": {+ "symbol": "cd4518bm96.kicad_sym",+ "footprint": "cd4518bm96.kicad_mod",+ "model_3d": "cd4518bm96-etched.glb",+ "model_3d_plain": "cd4518bm96.glb",+ "model_3d_step": "cd4518bm96-etched.step",+ "model_3d_step_plain": "cd4518bm96.step",+ "lbr": "cd4518bm96.lbr"+ },+ "distributor_links": {+ "lcsc": "C543030",+ "digikey": "296-CD4518BM96TR-ND",+ "mouser": "595-CD4518BM96"+ },+ "distributor_check": {+ "checked_at": "2026-09-29T23:20:14Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-CD4518BM96TR-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-CD4518BM96",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "CLKA",+ "type": "input",+ "description": "Clock input for counter A; counter increments on positive CLKA edge when ENABLEA is high, or on negative ENABLEA edge when CLKA is high; max f_CL 3 MHz typ / 6 MHz max at VDD=10 V."+ },+ {+ "number": "2",+ "name": "ENABLEA",+ "type": "input",+ "description": "Active-high enable input for counter A; when high, counter increments on positive CLKA edge; when low and CLKA is high, counter increments on falling ENABLEA edge."+ },+ {+ "number": "3",+ "name": "Q1A",+ "type": "output",+ "description": "BCD decade counter output Q1 (weight 1, LSB) of counter A; active high, propagation delay 115 ns typ at VDD=10 V."+ },+ {+ "number": "4",+ "name": "Q2A",+ "type": "output",+ "description": "BCD decade counter output Q2 (weight 2) of counter A; active high."+ },+ {+ "number": "5",+ "name": "Q3A",+ "type": "output",+ "description": "BCD decade counter output Q3 (weight 4) of counter A; active high."+ },+ {+ "number": "6",+ "name": "Q4A",+ "type": "output",+ "description": "BCD decade counter output Q4 (weight 8, MSB) of counter A; active high."+ },+ {+ "number": "7",+ "name": "RESETA",+ "type": "input",+ "description": "Active-high asynchronous reset input for counter A; forces Q1A-Q4A to logic 0 regardless of clock state; reset pulse width min 55 ns at VDD=10 V."+ },+ {+ "number": "8",+ "name": "VSS",+ "type": "power_in",+ "description": "Negative supply voltage (ground) reference; 0 V, lower rail of VDD=3 V to 18 V supply."+ },+ {+ "number": "9",+ "name": "CLKB",+ "type": "input",+ "description": "Clock input for counter B; same function as CLKA; counter increments on positive CLKB edge when ENABLEB is high, or on negative ENABLEB edge when CLKB is high."+ },+ {+ "number": "10",+ "name": "ENABLEB",+ "type": "input",+ "description": "Active-high enable input for counter B; same function as ENABLEA for the second independent BCD counter section."+ },+ {+ "number": "11",+ "name": "Q1B",+ "type": "output",+ "description": "BCD decade counter output Q1 (weight 1, LSB) of counter B; active high."+ },+ {+ "number": "12",+ "name": "Q2B",+ "type": "output",+ "description": "BCD decade counter output Q2 (weight 2) of counter B; active high."+ },+ {+ "number": "13",+ "name": "Q3B",+ "type": "output",+ "description": "BCD decade counter output Q3 (weight 4) of counter B; active high."+ },+ {+ "number": "14",+ "name": "Q4B",+ "type": "output",+ "description": "BCD decade counter output Q4 (weight 8, MSB) of counter B; active high."+ },+ {+ "number": "15",+ "name": "RESETB",+ "type": "input",+ "description": "Active-high asynchronous reset input for counter B; forces Q1B-Q4B to logic 0 regardless of clock state; reset pulse width min 55 ns at VDD=10 V."+ },+ {+ "number": "16",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply voltage; operating range 3 V to 18 V (full package temperature range); absolute maximum 20 V (VDD-VSS)."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cd4520b",+ "pages": 21,+ "sha256": "c28162391ada6d6a",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}