# CD4518BM

**HGSEMI** · Counters, Dividers · SOP-16

CD4518BM from HGSEMI, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLOCK A | input | Clock input of counter A, which increments on the positive-going transition when ENABLE A is held high. |
| 2 | ENABLE A | input | Enable input of counter A, interchangeable with CLOCK for incrementing on the negative-going transition, and held high for single-unit operation. |
| 3 | Q1A | output | Counter A stage 1 output. |
| 4 | Q2A | output | Counter A stage 2 output. |
| 5 | Q3A | output | Counter A stage 3 output. |
| 6 | Q4A | output | Counter A stage 4 output, which can be connected to the enable input of the next counter for ripple cascading. |
| 7 | RESET A | input | Reset input of counter A, where a high level clears Q1 through Q4 to 0. |
| 8 | VSS | power_in | Ground (VSS) reference for the supply. |
| 9 | CLOCK B | input | Clock input of counter B, which increments on the positive-going transition when ENABLE B is held high. |
| 10 | ENABLE B | input | Enable input of counter B, interchangeable with CLOCK for incrementing on the negative-going transition, and held high for single-unit operation. |
| 11 | Q1B | output | Counter B stage 1 output. |
| 12 | Q2B | output | Counter B stage 2 output. |
| 13 | Q3B | output | Counter B stage 3 output. |
| 14 | Q4B | output | Counter B stage 4 output, which can be connected to the enable input of the next counter for ripple cascading. |
| 15 | RESET B | input | Reset input of counter B, where a high level clears Q1 through Q4 to 0. |
| 16 | VDD | power_in | Positive supply, recommended 3V to 15V and absolute maximum 18V relative to VSS. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-16 |
| Category | Logic |
| Pins | 16 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage Range | VDD | -0.5 |  | 18 | V | Voltage referenced to VSS terminals | 3 |
| Input Voltage Range, All Inputs |  | -0.5 |  |  | V | All inputs; printed max is Vdd+0.5 | 3 |
| DC Input Current, Any One Input |  | -10 |  | 10 | mA | Any one input | 3 |
| Storage Temperature Range | TSTG | -65 |  | 150 | °C |  | 3 |
| Lead Temperature (During Soldering) |  |  |  | 260 | °C | At distance (1.59mm ±0.79mm) from case for 10s maximum | 3 |
| DC Supply Voltage | VDD | 3 |  | 15 | V |  | 3 |
| Operating Temperature Range | TA | -40 |  | 85 | °C |  | 3 |
| Supply Current | IDD |  |  | 10 | μA | VDD = 15V, VIN = VDD or GND, +25°C | 4 |
| Supply Current | IDD |  |  | 1000 | μA | VDD = 15V, VIN = VDD or GND, +85°C | 4 |
| Input Leakage Current | IIL | -100 |  |  | nA | VIN = VDD or GND, VDD = 15V, +25°C | 4 |
| Input Leakage Current | IIH |  |  | 100 | nA | VIN = VDD or GND, VDD = 15V, +25°C | 4 |
| Output Voltage | VOL15 |  |  | 50 | mV | VDD = 15V, No Load; +25°C, +85°C, -40°C | 4 |
| Output Voltage | VOH15 | 14.95 |  |  | V | VDD = 15V, No Load; +25°C, +85°C, -40°C | 4 |
| Output Current (Sink) | IOL5 | 0.53 |  |  | mA | VDD = 5V, VOUT = 0.4V, +25°C | 4 |
| Output Current (Sink) | IOL10 | 1.4 |  |  | mA | VDD = 10V, VOUT = 0.5V, +25°C | 4 |
| Output Current (Sink) | IOL15 | 3.5 |  |  | mA | VDD = 15V, VOUT = 1.5V, +25°C | 4 |
| Output Current (Source) | IOH5A |  |  | -0.53 | mA | VDD = 5V, VOUT = 4.6V, +25°C | 4 |
| Output Current (Source) | IOH5B |  |  | -1.8 | mA | VDD = 5V, VOUT = 2.5V, +25°C | 4 |
| Output Current (Source) | IOH10 |  |  | -1.4 | mA | VDD = 10V, VOUT = 9.5V, +25°C | 4 |
| Output Current (Source) | IOH15 |  |  | -3.5 | mA | VDD = 15V, VOUT = 13.5V, +25°C | 4 |
| N Threshold Voltage | VNTH | -2.8 |  | -0.7 | V | VDD = 10V, ISS = -10µA, +25°C | 4 |
| P Threshold Voltage | VPTH | 0.7 |  | 2.8 | V | VSS = 0V, IDD = 10µA, +25°C | 4 |
| Input Voltage Low | VIL |  |  | 1.5 | V | VDD = 5V, VOH > 4.5V, VOL < 0.5V; +25°C, +85°C, -40°C | 4 |
| Input Voltage High | VIH | 3.5 |  |  | V | VDD = 5V, VOH > 4.5V, VOL < 0.5V; +25°C, +85°C, -40°C | 4 |
| Input Voltage Low | VIL |  |  | 4 | V | VDD = 15V, VOH > 13.5V, VOL < 1.5V; +25°C, +85°C, -40°C | 4 |
| Input Voltage High | VIH | 11 |  |  | V | VDD = 15V, VOH > 13.5V, VOL < 1.5V; +25°C, +85°C, -40°C | 4 |
| Propagation Delay Clock to Output | TPHL1/TPLH1 |  |  | 560 | ns | VDD = 5V, VIN = VDD or GND, +25°C | 5 |
| Propagation Delay Clock to Output | TPHL1/TPLH1 |  |  | 756 | ns | VDD = 5V, VIN = VDD or GND, +85°C, -40°C | 5 |
| Propagation Delay Reset to Output | TPHL2 |  |  | 650 | ns | VDD = 5V, VIN = VDD or GND, +25°C | 5 |
| Propagation Delay Reset to Output | TPHL2 |  |  | 878 | ns | VDD = 5V, VIN = VDD or GND, +85°C, -40°C | 5 |
| Transition Time | TTHL/TTLH |  |  | 200 | ns | VDD = 5V, VIN = VDD or GND, +25°C | 5 |
| Transition Time | TTHL/TTLH |  |  | 270 | ns | VDD = 5V, VIN = VDD or GND, +85°C, -40°C | 5 |
| Maximum Clock Input Frequency | FCL | 1.5 |  |  | MHz | VDD = 5V, VIN = VDD or GND, +25°C | 5 |
| Maximum Clock Input Frequency | FCL | 1.11 |  |  | MHz | VDD = 5V, VIN = VDD or GND, +85°C, -40°C | 5 |
| Supply Current | IDD |  |  | 5 | μA | VDD = 5V, VIN = VDD or GND, -40°C, +25°C | 5 |
| Supply Current | IDD |  |  | 150 | μA | VDD = 5V, VIN = VDD or GND, +85°C | 5 |
| Supply Current | IDD |  |  | 10 | μA | VDD = 10V, VIN = VDD or GND, -40°C, +25°C | 5 |
| Supply Current | IDD |  |  | 300 | μA | VDD = 10V, VIN = VDD or GND, +85°C | 5 |
| Supply Current | IDD |  |  | 600 | μA | VDD = 15V, VIN = VDD or GND, +85°C | 5 |
| Output Current (Sink) | IOL5 | 0.36 |  |  | mA | VDD = 5V, VOUT = 0.4V, +85°C | 5 |
| Output Current (Sink) | IOL5 | 0.64 |  |  | mA | VDD = 5V, VOUT = 0.4V, -40°C | 5 |
| Output Current (Sink) | IOL10 | 0.9 |  |  | mA | VDD = 10V, VOUT = 0.5V, +85°C | 5 |
| Output Current (Sink) | IOL10 | 1.6 |  |  | mA | VDD = 10V, VOUT = 0.5V, -40°C | 5 |
| Output Current (Sink) | IOL15 | 2.4 |  |  | mA | VDD = 15V, VOUT = 1.5V, +85°C | 5 |
| Output Current (Sink) | IOL15 | 4.2 |  |  | mA | VDD = 15V, VOUT = 1.5V, -40°C | 5 |
| Output Current (Source) | IOH5A |  |  | -0.36 | mA | VDD = 5V, VOUT = 4.6V, +85°C | 5 |
| Output Current (Source) | IOH5A |  |  | -0.64 | mA | VDD = 5V, VOUT = 4.6V, -40°C | 5 |
| Output Current (Source) | IOH5B |  |  | -1.15 | mA | VDD = 5V, VOUT = 2.5V, +85°C | 5 |
| Output Current (Source) | IOH5B |  |  | -2 | mA | VDD = 5V, VOUT = 2.5V, -40°C | 5 |
| Output Current (Source) | IOH10 |  |  | -0.9 | mA | VDD = 10V, VOUT = 9.5V, +85°C | 5 |
| Output Current (Source) | IOH10 |  |  | -1.6 | mA | VDD = 10V, VOUT = 9.5V, -40°C | 5 |
| Output Current (Source) | IOH15 |  |  | -2.4 | mA | VDD = 15V, VOUT = 13.5V, +85°C | 5 |
| Output Current (Source) | IOH15 |  |  | -4.2 | mA | VDD = 15V, VOUT = 13.5V, -40°C | 5 |
| Propagation Delay Clock to Output | TPHL1/TPLH1 |  |  | 230 | ns | VDD = 10V | 6 |
| Propagation Delay Reset to Output | TPHL2 |  |  | 225 | ns | VDD = 10V | 6 |
| Propagation Delay Reset to Output | TPHL2 |  |  | 170 | ns | VDD = 15V | 6 |
| Maximum Clock Input Frequency | FCL | 3 |  |  | MHz | VDD = 10V | 6 |
| Maximum Clock Input Frequency | FCL | 4 |  |  | MHz | VDD = 15V | 6 |

## CAD (KiCad official)

- Symbol: `CD4518BM`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files: `cd4518bm-etched.step` / `cd4518bm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4518bm.step` / `cd4518bm.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [HGSEMI datasheet](docs/cd4518bm-datasheet.pdf) (14 pp, sha256 `38f2cabaace103c8`, retrieved 2026-11-04, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cd4518bm-datasheet.pdf)