component
CD4516BNSR
Public Made by Adomby adom
Texas Instruments Counters, Dividers, SO-16-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by adom_assets · KiCad file format 20240108
CD4516BNSR
Texas Instruments · Counters, Dividers · SO-16-208mil
CD4516BNSR from Texas Instruments, in a SO-16-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). The symbol is generated from that pin table and the footprint is an Adom_Gen land derived from the manufacturer drawing; the 3D model is generated to fit it.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PRESET ENABLE | input | A high level on this line presets the counter to the binary number present on the jam inputs P1-P4. |
| 2 | Q4 | output | Buffered counter output Q4, the most significant bit of the binary count. |
| 3 | P4 | input | Jam (preset) input 4, loaded into the counter when PRESET ENABLE is high. |
| 4 | P1 | input | Jam (preset) input 1, loaded into the counter when PRESET ENABLE is high. |
| 5 | CARRY IN | input | Active-low carry input; with CARRY IN held low the counter advances up or down on each positive-going clock transition. |
| 6 | Q1 | output | Buffered counter output Q1, the least significant bit of the binary count. |
| 7 | CARRY OUT | output | Active-low carry output used to cascade to the CARRY IN of a more significant stage. |
| 8 | VSS | power_in | Negative supply (ground) terminal; the supply voltage is referenced to this pin. |
| 9 | RESET | input | A high level on this line clears the counter. |
| 10 | UP/DOWN | input | Selects the count direction, up or down, and may be changed at any count in ripple mode provided the clock input to the first stage is high. |
| 11 | Q2 | output | Buffered counter output Q2 of the binary count. |
| 12 | P2 | input | Jam (preset) input 2, loaded into the counter when PRESET ENABLE is high. |
| 13 | P3 | input | Jam (preset) input 3, loaded into the counter when PRESET ENABLE is high. |
| 14 | Q3 | output | Buffered counter output Q3 of the binary count. |
| 15 | CLOCK | input | Clock input; the counter advances on the positive-going clock transition, with a typical maximum clock frequency of 8 MHz at 10 V. |
| 16 | VDD | power_in | Positive supply terminal with a recommended range of 3 V to 18 V and an absolute maximum of -0.5 V to +20 V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SO-16-208mil |
| Category | Logic |
| Pins | 16 |
CAD (Adom-generated)
- Symbol:
CD4516BNSR - Footprint:
Adom_Gen:Texas_Instruments_CD4516 - 3D model: generated to fit the land (STEP)
- 3D model files:
cd4516bnsr-etched.step/cd4516bnsr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4516bnsr.step/cd4516bnsr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (20 pp, sha256
fc185675c565180b, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: symbol generated from the datasheet pin table; footprint an Adom_Gen land derived from the manufacturer drawing. 3D model generated to fit that land.