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CD4514BM96

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by adom

Texas Instruments Signal Switches, Multiplexers, Decoders, SOIC-24-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs cd4514bm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers cd4514bm96: viewers · Ray
cd4514bm96-etched.fit.json cd4514bm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4514bm96-etched.glb cd4514bm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4514bm96-etched.step cd4514bm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4514bm96.glb Publish 0.1.0 · Ray
cd4514bm96.kicad_mod Publish 0.1.0 · Ray
cd4514bm96.kicad_sym Publish 0.1.0 · Ray
cd4514bm96.lbr Publish 0.1.0 · Ray
cd4514bm96.step Publish 0.1.0 · Ray
package.json cd4514bm96: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
page.json cd4514bm96: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md Initial commit: component/cd4514bm96 · Ray

CD4514BM96

Texas Instruments · Signal Switches, Multiplexers, Decoders · SOIC-24-300mil

CD4514BM96 from Texas Instruments, in a SOIC-24-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 STROBE input Strobe input for the 4-bit latch; the latch holds the data present on DATA1-DATA4 at the strobe's 1-to-0 (high-to-low) transition and is transparent while STROBE is high; input voltage range -0.5V to VDD+0.5V, input current limited to ±10mA (absolute max).
2 DATA1 input 4-bit latch data input (bit 1) that forms part of the address selecting one of 16 decoder outputs; input voltage range -0.5V to VDD+0.5V, input current limited to ±10mA (absolute max).
3 DATA2 input 4-bit latch data input (bit 2) that forms part of the address selecting one of 16 decoder outputs; input voltage range -0.5V to VDD+0.5V, input current limited to ±10mA (absolute max).
4 S7 output Decoded output 7; driven high when address 7 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
5 S6 output Decoded output 6; driven high when address 6 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
6 S5 output Decoded output 5; driven high when address 5 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
7 S4 output Decoded output 4; driven high when address 4 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
8 S3 output Decoded output 3; driven high when address 3 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
9 S1 output Decoded output 1; driven high when address 1 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
10 S2 output Decoded output 2; driven high when address 2 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
11 S0 output Decoded output 0; driven high when address 0 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
12 VSS power_in Negative supply (ground) reference terminal; all input and output voltages are referenced to this pin (0V).
13 S13 output Decoded output 13; driven high when address 13 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
14 S12 output Decoded output 12; driven high when address 12 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
15 S15 output Decoded output 15; driven high when address 15 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
16 S14 output Decoded output 14; driven high when address 14 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
17 S9 output Decoded output 9; driven high when address 9 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
18 S8 output Decoded output 8; driven high when address 8 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
19 S11 output Decoded output 11; driven high when address 11 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
20 S10 output Decoded output 10; driven high when address 10 is selected (CD4514B) or low when selected (CD4515B); all outputs forced to the inhibit level when INHIBIT is active.
21 DATA3 input 4-bit latch data input (bit 3) that forms part of the address selecting one of 16 decoder outputs; input voltage range -0.5V to VDD+0.5V, input current limited to ±10mA (absolute max).
22 DATA4 input 4-bit latch data input (bit 4) that forms part of the address selecting one of 16 decoder outputs; input voltage range -0.5V to VDD+0.5V, input current limited to ±10mA (absolute max).
23 INHIBIT input Inhibit control input; when active it forces all 16 outputs to 0 (CD4514B) or 1 (CD4515B) regardless of the state of the data or strobe inputs; input voltage range -0.5V to VDD+0.5V.
24 VDD power_in Positive supply voltage pin referenced to VSS; absolute-maximum DC supply range -0.5V to +20V, recommended operating supply range 3V to 18V, package power dissipation up to 500mW for TA=-55°C to +100°C.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-24-300mil
Category Logic
Pins 24

CAD (KiCad official)

  • Symbol: CD4514BM96
  • Footprint: Package_SO:SOIC-24W_7.5x15.4mm_P1.27mm
  • 3D model: SOIC-24-300mil (KiCad packages3D, STEP)
  • 3D model files: cd4514bm96-etched.step / cd4514bm96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4514bm96.step / cd4514bm96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (16 pp, sha256 5c2beeaa7d661a08, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF