component
CD4099BM
Public Made by Adomby adom
Texas Instruments Latches, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# CD4099BM++**Texas Instruments** · Latches · SOIC-16++CD4099BM from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Q7 | output | Parallel latch output 7 (active high); follows data when addressed, otherwise holds its state. |+| 2 | RESET | input | Master reset input; with WRITE DISABLE high it resets all latches to logic 0, with WRITE DISABLE low the device acts as a 1-of-8 demultiplexer. |+| 3 | DATA | input | Serial data input written to the addressed latch when WRITE DISABLE is low; input range -0.5 V to VDD+0.5 V. |+| 4 | WRITE DISABLE | input | When low, data entry to the addressed latch is enabled; when high, data entry is inhibited while outputs can still be read. |+| 5 | A0 | input | Address input bit 0 selecting which of the 8 latches is addressed. |+| 6 | A1 | input | Address input bit 1 selecting which of the 8 latches is addressed. |+| 7 | A2 | input | Address input bit 2 selecting which of the 8 latches is addressed. |+| 8 | VSS | power_in | Ground (negative supply) reference terminal; all voltage ratings are referenced to VSS. |+| 9 | Q0 | output | Parallel latch output 0 (active high). |+| 10 | Q1 | output | Parallel latch output 1 (active high). |+| 11 | Q2 | output | Parallel latch output 2 (active high). |+| 12 | Q3 | output | Parallel latch output 3 (active high). |+| 13 | Q4 | output | Parallel latch output 4 (active high). |+| 14 | Q5 | output | Parallel latch output 5 (active high). |+| 15 | Q6 | output | Parallel latch output 6 (active high). |+| 16 | VDD | power_in | Positive supply; recommended 3 V to 18 V, absolute maximum -0.5 V to +20 V referenced to VSS. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD4099BM`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `cd4099bm-etched.step` / `cd4099bm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4099bm.step` / `cd4099bm.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd4099b-mil) (19 pp, sha256 `52fc48c47f5273e0`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4099bm-datasheet.pdf)
page.jsonadded+249@@ -0,0 +1,249 @@+{+ "slug": "cd4099bm",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Latches, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd4099bm",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd4099bm.kicad_sym",+ "cd4099bm.kicad_mod",+ "cd4099bm.glb",+ "cd4099bm.step",+ "cd4099bm.lbr",+ "docs/hero.png",+ "docs/cd4099bm-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "cd4099bm-hero.glb",+ "cd4099bm-hero.overlay.json"+ ],+ "component": {+ "mpn": "CD4099BM",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Latches",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cd4099b-mil",+ "parts": {+ "symbol": "cd4099bm.kicad_sym",+ "footprint": "cd4099bm.kicad_mod",+ "model_3d": "cd4099bm-hero.glb",+ "model_3d_plain": "cd4099bm.glb",+ "model_3d_step": "cd4099bm-etched.step",+ "model_3d_step_plain": "cd4099bm.step",+ "lbr": "cd4099bm.lbr"+ },+ "distributor_links": {+ "lcsc": "C2870249",+ "digikey": "2156-CD4099BM-ND",+ "mouser": "595-CD4099BM"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T22:45:04Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "2156-CD4099BM-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-CD4099BM",+ "status": "found",+ "lifecycle": "End of Life"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "Q7",+ "type": "output",+ "description": "Parallel latch output 7 (active high); follows data when addressed, otherwise holds its state."+ },+ {+ "number": "2",+ "name": "RESET",+ "type": "input",+ "description": "Master reset input; with WRITE DISABLE high it resets all latches to logic 0, with WRITE DISABLE low the device acts as a 1-of-8 demultiplexer."+ },+ {+ "number": "3",+ "name": "DATA",+ "type": "input",+ "description": "Serial data input written to the addressed latch when WRITE DISABLE is low; input range -0.5 V to VDD+0.5 V."+ },+ {+ "number": "4",+ "name": "WRITE DISABLE",+ "type": "input",+ "description": "When low, data entry to the addressed latch is enabled; when high, data entry is inhibited while outputs can still be read."+ },+ {+ "number": "5",+ "name": "A0",+ "type": "input",+ "description": "Address input bit 0 selecting which of the 8 latches is addressed."+ },+ {+ "number": "6",+ "name": "A1",+ "type": "input",+ "description": "Address input bit 1 selecting which of the 8 latches is addressed."+ },+ {+ "number": "7",+ "name": "A2",+ "type": "input",+ "description": "Address input bit 2 selecting which of the 8 latches is addressed."+ },+ {+ "number": "8",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground (negative supply) reference terminal; all voltage ratings are referenced to VSS."+ },+ {+ "number": "9",+ "name": "Q0",+ "type": "output",+ "description": "Parallel latch output 0 (active high)."+ },+ {+ "number": "10",+ "name": "Q1",+ "type": "output",+ "description": "Parallel latch output 1 (active high)."+ },+ {+ "number": "11",+ "name": "Q2",+ "type": "output",+ "description": "Parallel latch output 2 (active high)."+ },+ {+ "number": "12",+ "name": "Q3",+ "type": "output",+ "description": "Parallel latch output 3 (active high)."+ },+ {+ "number": "13",+ "name": "Q4",+ "type": "output",+ "description": "Parallel latch output 4 (active high)."+ },+ {+ "number": "14",+ "name": "Q5",+ "type": "output",+ "description": "Parallel latch output 5 (active high)."+ },+ {+ "number": "15",+ "name": "Q6",+ "type": "output",+ "description": "Parallel latch output 6 (active high)."+ },+ {+ "number": "16",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply; recommended 3 V to 18 V, absolute maximum -0.5 V to +20 V referenced to VSS."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-sonnet-5-5",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet's terminal assignment (top view, page 1) is a single 16-pin drawing for all package ty; The addendum lists CD4099BM (SOIC D-16) as Obsolete. The orderable replacement is CD4099BM96 (Active; The input pins' direction and the Q outputs' type are taken from the functional diagram. The scan is",+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 19,+ "cost_usd": 0.3492,+ "at": "2026-10-07T22:44:46"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cd4099b-mil",+ "pages": 19,+ "sha256": "52fc48c47f5273e0",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "cd4099bm.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "cd4099bm-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "132d43db7839bb93fb6f93cc276b0356a6dee64c5d8619bb2ad7bb23a55743d6",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}