component
CD4099BM
Public Made by Adomby adom
Texas Instruments Latches, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4099BM
Texas Instruments · Latches · SOIC-16
CD4099BM from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q7 | output | Parallel latch output 7 (active high); follows data when addressed, otherwise holds its state. |
| 2 | RESET | input | Master reset input; with WRITE DISABLE high it resets all latches to logic 0, with WRITE DISABLE low the device acts as a 1-of-8 demultiplexer. |
| 3 | DATA | input | Serial data input written to the addressed latch when WRITE DISABLE is low; input range -0.5 V to VDD+0.5 V. |
| 4 | WRITE DISABLE | input | When low, data entry to the addressed latch is enabled; when high, data entry is inhibited while outputs can still be read. |
| 5 | A0 | input | Address input bit 0 selecting which of the 8 latches is addressed. |
| 6 | A1 | input | Address input bit 1 selecting which of the 8 latches is addressed. |
| 7 | A2 | input | Address input bit 2 selecting which of the 8 latches is addressed. |
| 8 | VSS | power_in | Ground (negative supply) reference terminal; all voltage ratings are referenced to VSS. |
| 9 | Q0 | output | Parallel latch output 0 (active high). |
| 10 | Q1 | output | Parallel latch output 1 (active high). |
| 11 | Q2 | output | Parallel latch output 2 (active high). |
| 12 | Q3 | output | Parallel latch output 3 (active high). |
| 13 | Q4 | output | Parallel latch output 4 (active high). |
| 14 | Q5 | output | Parallel latch output 5 (active high). |
| 15 | Q6 | output | Parallel latch output 6 (active high). |
| 16 | VDD | power_in | Positive supply; recommended 3 V to 18 V, absolute maximum -0.5 V to +20 V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD4099BM - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
cd4099bm-etched.step/cd4099bm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4099bm.step/cd4099bm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (19 pp, sha256
52fc48c47f5273e0, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).