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CD4098BM

Texas Instruments · Monostable Multivibrators · SOIC-16

CD4098BM from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Cx1	passive	External timing capacitor terminal for monostable 1, electrically connected internally to terminals 8 and 15 (VSS).
2	Rx Cx (1)	passive	Junction of the external timing resistor Rx1 (to VDD) and capacitor Cx1 for monostable 1, with a minimum Rx of 5 kΩ and a maximum Cx of 100 µF.
3	RESET (1)	input	Active-low reset for monostable 1 that immediately terminates the output pulse or prevents pulses at power-on, and should be tied to VDD when unused.
4	+TR (1)	input	Leading-edge (positive) trigger input for monostable 1, which should be tied to VSS when unused.
5	-TR (1)	input	Trailing-edge (negative) trigger input for monostable 1, which should be tied to VDD when unused.
6	Q1	output	Buffered Q output of monostable 1.
7	Q̄1	output	Buffered complementary (Q-bar) output of monostable 1.
8	VSS	power_in	Negative supply terminal (ground), electrically connected internally to terminals 1 and 15.
9	Q̄2	output	Buffered complementary (Q-bar) output of monostable 2.
10	Q2	output	Buffered Q output of monostable 2.
11	-TR (2)	input	Trailing-edge (negative) trigger input for monostable 2, which should be tied to VDD when unused.
12	+TR (2)	input	Leading-edge (positive) trigger input for monostable 2, which should be tied to VSS when unused.
13	RESET (2)	input	Active-low reset for monostable 2 that immediately terminates the output pulse or prevents pulses at power-on, and should be tied to VDD when unused.
14	Rx Cx (2)	passive	Junction of the external timing resistor Rx2 (to VDD) and capacitor Cx2 for monostable 2, with a minimum Rx of 5 kΩ and a maximum Cx of 100 µF.
15	Cx2	passive	External timing capacitor terminal for monostable 2, electrically connected internally to terminals 1 and 8 (VSS).
16	VDD	power_in	Positive supply terminal with a recommended range of 3 V to 18 V and an absolute maximum of -0.5 V to +20 V referenced to VSS.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-16
Category	Logic
Pins	16

CAD (KiCad official)

Symbol: CD4098BM
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)
3D model files: cd4098bm-etched.step / cd4098bm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4098bm.step / cd4098bm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (17 pp, sha256 699241f92bb31789, retrieved 2026-11-05, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF