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Ray ·53c5c28d54 ·
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README.mdadded+60
@@ -0,0 +1,60 @@+# CD4097BPWR++**Texas Instruments** · Analog Switches, Multiplexers · TSSOP-24++CD4097BPWR from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | X OUT/IN | passive | Common X out/in terminal of the 8-channel X section; single common line connected to whichever X channel (pins 2-9) is selected by address inputs A, B, C when INHIBIT is low. |+| 2 | X7 IN/OUT | passive | Analog switch channel 7 of the X section; connects to common X (pin 1) when A=1, B=1, C=1 and INHIBIT=0 (selects channel 7X,7Y per truth table). |+| 3 | X6 IN/OUT | passive | Analog switch channel 6 of the X section; connects to common X (pin 1) when A=0, B=1, C=1 and INHIBIT=0 (selects channel 6X,6Y). |+| 4 | X5 IN/OUT | passive | Analog switch channel 5 of the X section; connects to common X (pin 1) when A=1, B=0, C=1 and INHIBIT=0 (selects channel 5X,5Y). |+| 5 | X4 IN/OUT | passive | Analog switch channel 4 of the X section; connects to common X (pin 1) when A=0, B=0, C=1 and INHIBIT=0 (selects channel 4X,4Y). |+| 6 | X3 IN/OUT | passive | Analog switch channel 3 of the X section; connects to common X (pin 1) when A=1, B=1, C=0 and INHIBIT=0 (selects channel 3X,3Y). |+| 7 | X2 IN/OUT | passive | Analog switch channel 2 of the X section; connects to common X (pin 1) when A=0, B=1, C=0 and INHIBIT=0 (selects channel 2X,2Y). |+| 8 | X1 IN/OUT | passive | Analog switch channel 1 of the X section; connects to common X (pin 1) when A=1, B=0, C=0 and INHIBIT=0 (selects channel 1X,1Y). |+| 9 | X0 IN/OUT | passive | Analog switch channel 0 of the X section; connects to common X (pin 1) when A=0, B=0, C=0 and INHIBIT=0 (selects channel 0X,0Y). |+| 10 | A | input | Binary address input (least-significant select bit); together with B and C selects one of 8 channel pairs per the CD4097 truth table; logic levels 0 to VDD. |+| 11 | B | input | Binary address input; together with A and C selects one of 8 channel pairs per the CD4097 truth table; logic levels 0 to VDD. |+| 12 | VSS | power_in | Negative supply/ground reference pin; the supply differential VDD-VSS must be within 3V to 18V per Recommended Operating Conditions. |+| 13 | INHIBIT | input | Inhibit control input; a logic 1 turns off (opens) all X and Y channels regardless of the A, B, C address state, logic 0 enables normal address-selected switching. |+| 14 | C | input | Binary address input (most-significant select bit); together with A and B selects one of 8 channel pairs per the CD4097 truth table; logic levels 0 to VDD. |+| 15 | Y7 IN/OUT | passive | Analog switch channel 7 of the Y section; connects to common Y (pin 17) when A=1, B=1, C=1 and INHIBIT=0 (selects channel 7X,7Y). |+| 16 | Y6 IN/OUT | passive | Analog switch channel 6 of the Y section; connects to common Y (pin 17) when A=0, B=1, C=1 and INHIBIT=0 (selects channel 6X,6Y). |+| 17 | Y OUT/IN | passive | Common Y out/in terminal of the 8-channel Y section; single common line connected to whichever Y channel (pins 15,16,18-23) is selected by address inputs A, B, C when INHIBIT is low. |+| 18 | Y5 IN/OUT | passive | Analog switch channel 5 of the Y section; connects to common Y (pin 17) when A=1, B=0, C=1 and INHIBIT=0 (selects channel 5X,5Y). |+| 19 | Y4 IN/OUT | passive | Analog switch channel 4 of the Y section; connects to common Y (pin 17) when A=0, B=0, C=1 and INHIBIT=0 (selects channel 4X,4Y). |+| 20 | Y3 IN/OUT | passive | Analog switch channel 3 of the Y section; connects to common Y (pin 17) when A=1, B=1, C=0 and INHIBIT=0 (selects channel 3X,3Y). |+| 21 | Y2 IN/OUT | passive | Analog switch channel 2 of the Y section; connects to common Y (pin 17) when A=0, B=1, C=0 and INHIBIT=0 (selects channel 2X,2Y). |+| 22 | Y1 IN/OUT | passive | Analog switch channel 1 of the Y section; connects to common Y (pin 17) when A=1, B=0, C=0 and INHIBIT=0 (selects channel 1X,1Y). |+| 23 | Y0 IN/OUT | passive | Analog switch channel 0 of the Y section; connects to common Y (pin 17) when A=0, B=0, C=0 and INHIBIT=0 (selects channel 0X,0Y). |+| 24 | VDD | power_in | Positive supply voltage pin; recommended operating range 3V to 18V above VSS, absolute maximum rating VDD 20V (per Absolute Maximum Ratings). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-24 |+| Category | Interface |+| Pins | 24 |++## CAD (KiCad official)++- Symbol: `CD4097BPWR`+- Footprint: `Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm`+- 3D model: TSSOP-24 (KiCad packages3D, STEP)+- 3D model files: `cd4097bpwr-etched.step` / `cd4097bpwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4097bpwr.step` / `cd4097bpwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd4097b.pdf) (26 pp, sha256 `f4442d198734c9d8`, retrieved 2026-09-23, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-sonnet-5` (text+vision), consensus `claude-opus-4-8` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4097bpwr-datasheet.pdf)
page.jsonadded+240
@@ -0,0 +1,240 @@+{+  "slug": "cd4097bpwr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Analog Switches, Multiplexers, TSSOP-24. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "interface",+    "cd4097bpwr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cd4097bpwr.kicad_sym",+    "cd4097bpwr.kicad_mod",+    "cd4097bpwr.glb",+    "cd4097bpwr.step",+    "cd4097bpwr.lbr",+    "docs/hero.png",+    "docs/cd4097bpwr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "CD4097BPWR",+    "manufacturer": "Texas Instruments",+    "package": "TSSOP-24",+    "pin_count": 24,+    "category": "Interface",+    "subcategory": "Analog Switches, Multiplexers",+    "datasheet": "https://www.ti.com/lit/ds/symlink/cd4097b.pdf",+    "parts": {+      "symbol": "cd4097bpwr.kicad_sym",+      "footprint": "cd4097bpwr.kicad_mod",+      "model_3d": "cd4097bpwr-etched.glb",+      "model_3d_plain": "cd4097bpwr.glb",+      "model_3d_step": "cd4097bpwr-etched.step",+      "model_3d_step_plain": "cd4097bpwr.step",+      "lbr": "cd4097bpwr.lbr"+    },+    "distributor_links": {+      "lcsc": "C2673223"+    },+    "pins": [+      {+        "number": "1",+        "name": "X OUT/IN",+        "type": "passive",+        "description": "Common X out/in terminal of the 8-channel X section; single common line connected to whichever X channel (pins 2-9) is selected by address inputs A, B, C when INHIBIT is low."+      },+      {+        "number": "2",+        "name": "X7 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 7 of the X section; connects to common X (pin 1) when A=1, B=1, C=1 and INHIBIT=0 (selects channel 7X,7Y per truth table)."+      },+      {+        "number": "3",+        "name": "X6 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 6 of the X section; connects to common X (pin 1) when A=0, B=1, C=1 and INHIBIT=0 (selects channel 6X,6Y)."+      },+      {+        "number": "4",+        "name": "X5 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 5 of the X section; connects to common X (pin 1) when A=1, B=0, C=1 and INHIBIT=0 (selects channel 5X,5Y)."+      },+      {+        "number": "5",+        "name": "X4 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 4 of the X section; connects to common X (pin 1) when A=0, B=0, C=1 and INHIBIT=0 (selects channel 4X,4Y)."+      },+      {+        "number": "6",+        "name": "X3 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 3 of the X section; connects to common X (pin 1) when A=1, B=1, C=0 and INHIBIT=0 (selects channel 3X,3Y)."+      },+      {+        "number": "7",+        "name": "X2 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 2 of the X section; connects to common X (pin 1) when A=0, B=1, C=0 and INHIBIT=0 (selects channel 2X,2Y)."+      },+      {+        "number": "8",+        "name": "X1 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 1 of the X section; connects to common X (pin 1) when A=1, B=0, C=0 and INHIBIT=0 (selects channel 1X,1Y)."+      },+      {+        "number": "9",+        "name": "X0 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 0 of the X section; connects to common X (pin 1) when A=0, B=0, C=0 and INHIBIT=0 (selects channel 0X,0Y)."+      },+      {+        "number": "10",+        "name": "A",+        "type": "input",+        "description": "Binary address input (least-significant select bit); together with B and C selects one of 8 channel pairs per the CD4097 truth table; logic levels 0 to VDD."+      },+      {+        "number": "11",+        "name": "B",+        "type": "input",+        "description": "Binary address input; together with A and C selects one of 8 channel pairs per the CD4097 truth table; logic levels 0 to VDD."+      },+      {+        "number": "12",+        "name": "VSS",+        "type": "power_in",+        "description": "Negative supply/ground reference pin; the supply differential VDD-VSS must be within 3V to 18V per Recommended Operating Conditions."+      },+      {+        "number": "13",+        "name": "INHIBIT",+        "type": "input",+        "description": "Inhibit control input; a logic 1 turns off (opens) all X and Y channels regardless of the A, B, C address state, logic 0 enables normal address-selected switching."+      },+      {+        "number": "14",+        "name": "C",+        "type": "input",+        "description": "Binary address input (most-significant select bit); together with A and B selects one of 8 channel pairs per the CD4097 truth table; logic levels 0 to VDD."+      },+      {+        "number": "15",+        "name": "Y7 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 7 of the Y section; connects to common Y (pin 17) when A=1, B=1, C=1 and INHIBIT=0 (selects channel 7X,7Y)."+      },+      {+        "number": "16",+        "name": "Y6 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 6 of the Y section; connects to common Y (pin 17) when A=0, B=1, C=1 and INHIBIT=0 (selects channel 6X,6Y)."+      },+      {+        "number": "17",+        "name": "Y OUT/IN",+        "type": "passive",+        "description": "Common Y out/in terminal of the 8-channel Y section; single common line connected to whichever Y channel (pins 15,16,18-23) is selected by address inputs A, B, C when INHIBIT is low."+      },+      {+        "number": "18",+        "name": "Y5 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 5 of the Y section; connects to common Y (pin 17) when A=1, B=0, C=1 and INHIBIT=0 (selects channel 5X,5Y)."+      },+      {+        "number": "19",+        "name": "Y4 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 4 of the Y section; connects to common Y (pin 17) when A=0, B=0, C=1 and INHIBIT=0 (selects channel 4X,4Y)."+      },+      {+        "number": "20",+        "name": "Y3 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 3 of the Y section; connects to common Y (pin 17) when A=1, B=1, C=0 and INHIBIT=0 (selects channel 3X,3Y)."+      },+      {+        "number": "21",+        "name": "Y2 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 2 of the Y section; connects to common Y (pin 17) when A=0, B=1, C=0 and INHIBIT=0 (selects channel 2X,2Y)."+      },+      {+        "number": "22",+        "name": "Y1 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 1 of the Y section; connects to common Y (pin 17) when A=1, B=0, C=0 and INHIBIT=0 (selects channel 1X,1Y)."+      },+      {+        "number": "23",+        "name": "Y0 IN/OUT",+        "type": "passive",+        "description": "Analog switch channel 0 of the Y section; connects to common Y (pin 17) when A=0, B=0, C=0 and INHIBIT=0 (selects channel 0X,0Y)."+      },+      {+        "number": "24",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply voltage pin; recommended operating range 3V to 18V above VSS, absolute maximum rating VDD 20V (per Absolute Maximum Ratings)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-sonnet-5",+        "primary_mode": "text+vision",+        "consensus_model": "claude-opus-4-8",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Pin numbering/topology for the CD4097 TSSOP-24 was taken from the Figure 2 logic-diagram terminal ci",+          "vision extraction: provenance cannot be text-verified; needs consensus"+        ],+        "pages_sent": 26,+        "cost_usd": 0.8274,+        "at": "2026-09-23T06:58:41"+      },+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/cd4097b.pdf",+        "pages": 26,+        "sha256": "f4442d198734c9d8",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 24,+        "described": 24,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file