component

CD4097BPWR

Public Made by Adom

by adom

Texas Instruments Analog Switches, Multiplexers, TSSOP-24. Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentinterfacecd4097bpwrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

CD4097BPWR

Texas Instruments · Analog Switches, Multiplexers · TSSOP-24

CD4097BPWR from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 X OUT/IN passive Common X out/in terminal of the 8-channel X section; single common line connected to whichever X channel (pins 2-9) is selected by address inputs A, B, C when INHIBIT is low.
2 X7 IN/OUT passive Analog switch channel 7 of the X section; connects to common X (pin 1) when A=1, B=1, C=1 and INHIBIT=0 (selects channel 7X,7Y per truth table).
3 X6 IN/OUT passive Analog switch channel 6 of the X section; connects to common X (pin 1) when A=0, B=1, C=1 and INHIBIT=0 (selects channel 6X,6Y).
4 X5 IN/OUT passive Analog switch channel 5 of the X section; connects to common X (pin 1) when A=1, B=0, C=1 and INHIBIT=0 (selects channel 5X,5Y).
5 X4 IN/OUT passive Analog switch channel 4 of the X section; connects to common X (pin 1) when A=0, B=0, C=1 and INHIBIT=0 (selects channel 4X,4Y).
6 X3 IN/OUT passive Analog switch channel 3 of the X section; connects to common X (pin 1) when A=1, B=1, C=0 and INHIBIT=0 (selects channel 3X,3Y).
7 X2 IN/OUT passive Analog switch channel 2 of the X section; connects to common X (pin 1) when A=0, B=1, C=0 and INHIBIT=0 (selects channel 2X,2Y).
8 X1 IN/OUT passive Analog switch channel 1 of the X section; connects to common X (pin 1) when A=1, B=0, C=0 and INHIBIT=0 (selects channel 1X,1Y).
9 X0 IN/OUT passive Analog switch channel 0 of the X section; connects to common X (pin 1) when A=0, B=0, C=0 and INHIBIT=0 (selects channel 0X,0Y).
10 A input Binary address input (least-significant select bit); together with B and C selects one of 8 channel pairs per the CD4097 truth table; logic levels 0 to VDD.
11 B input Binary address input; together with A and C selects one of 8 channel pairs per the CD4097 truth table; logic levels 0 to VDD.
12 VSS power_in Negative supply/ground reference pin; the supply differential VDD-VSS must be within 3V to 18V per Recommended Operating Conditions.
13 INHIBIT input Inhibit control input; a logic 1 turns off (opens) all X and Y channels regardless of the A, B, C address state, logic 0 enables normal address-selected switching.
14 C input Binary address input (most-significant select bit); together with A and B selects one of 8 channel pairs per the CD4097 truth table; logic levels 0 to VDD.
15 Y7 IN/OUT passive Analog switch channel 7 of the Y section; connects to common Y (pin 17) when A=1, B=1, C=1 and INHIBIT=0 (selects channel 7X,7Y).
16 Y6 IN/OUT passive Analog switch channel 6 of the Y section; connects to common Y (pin 17) when A=0, B=1, C=1 and INHIBIT=0 (selects channel 6X,6Y).
17 Y OUT/IN passive Common Y out/in terminal of the 8-channel Y section; single common line connected to whichever Y channel (pins 15,16,18-23) is selected by address inputs A, B, C when INHIBIT is low.
18 Y5 IN/OUT passive Analog switch channel 5 of the Y section; connects to common Y (pin 17) when A=1, B=0, C=1 and INHIBIT=0 (selects channel 5X,5Y).
19 Y4 IN/OUT passive Analog switch channel 4 of the Y section; connects to common Y (pin 17) when A=0, B=0, C=1 and INHIBIT=0 (selects channel 4X,4Y).
20 Y3 IN/OUT passive Analog switch channel 3 of the Y section; connects to common Y (pin 17) when A=1, B=1, C=0 and INHIBIT=0 (selects channel 3X,3Y).
21 Y2 IN/OUT passive Analog switch channel 2 of the Y section; connects to common Y (pin 17) when A=0, B=1, C=0 and INHIBIT=0 (selects channel 2X,2Y).
22 Y1 IN/OUT passive Analog switch channel 1 of the Y section; connects to common Y (pin 17) when A=1, B=0, C=0 and INHIBIT=0 (selects channel 1X,1Y).
23 Y0 IN/OUT passive Analog switch channel 0 of the Y section; connects to common Y (pin 17) when A=0, B=0, C=0 and INHIBIT=0 (selects channel 0X,0Y).
24 VDD power_in Positive supply voltage pin; recommended operating range 3V to 18V above VSS, absolute maximum rating VDD 20V (per Absolute Maximum Ratings).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-24
Category Interface
Pins 24

CAD (KiCad official)

  • Symbol: CD4097BPWR
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: cd4097bpwr-etched.step / cd4097bpwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4097bpwr.step / cd4097bpwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 f4442d198734c9d8, retrieved 2026-09-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF