CD4094BPWR

{
  "slug": "cd4094bpwr",
  "version": "0.1.1",
  "type": "component",
  "description": "Texas Instruments Shift Registers, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "tags": [
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    "logic",
    "cd4094bpwr",
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    "extractor-text"
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    "cd4094bpwr.step",
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  "component": {
    "mpn": "CD4094BPWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Shift Registers",
    "datasheet": "https://www.ti.com/lit/ds/symlink/cd4094b.pdf",
    "parts": {
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      "lbr": "cd4094bpwr.lbr"
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    "distributor_links": {
      "lcsc": "C129938"
    },
    "pins": [
      {
        "number": "1",
        "name": "STROBE",
        "type": "input",
        "description": "Strobe input; when high, transfers data from the 8-stage shift register into the associated 8-bit storage register."
      },
      {
        "number": "2",
        "name": "DATA",
        "type": "input",
        "description": "Serial data input to the first shift-register stage; data is shifted into the register on positive clock transitions."
      },
      {
        "number": "3",
        "name": "CLOCK",
        "type": "input",
        "description": "Clock input that shifts data through the 8-stage register on positive-going transitions."
      },
      {
        "number": "4",
        "name": "Q1",
        "type": "tri_state",
        "description": "3-state buffered parallel output of shift-register stage 1, driven from the storage register and enabled by OUTPUT ENABLE."
      },
      {
        "number": "5",
        "name": "Q2",
        "type": "tri_state",
        "description": "3-state buffered parallel output of shift-register stage 2, driven from the storage register and enabled by OUTPUT ENABLE."
      },
      {
        "number": "6",
        "name": "Q3",
        "type": "tri_state",
        "description": "3-state buffered parallel output of shift-register stage 3, driven from the storage register and enabled by OUTPUT ENABLE."
      },
      {
        "number": "7",
        "name": "Q4",
        "type": "tri_state",
        "description": "3-state buffered parallel output of shift-register stage 4, driven from the storage register and enabled by OUTPUT ENABLE."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply / ground reference terminal; all other pin voltages are referenced to VSS."
      },
      {
        "number": "9",
        "name": "QS",
        "type": "output",
        "description": "Serial output synchronous to the positive clock edge, used for cascading CD4094B devices in high-speed systems with fast clock rise time."
      },
      {
        "number": "10",
        "name": "Q'S",
        "type": "output",
        "description": "Serial output synchronous to the negative clock edge, providing the same serial information as QS for cascading devices when clock rise time is slow."
      },
      {
        "number": "11",
        "name": "Q8",
        "type": "tri_state",
        "description": "3-state buffered parallel output of shift-register stage 8, driven from the storage register and enabled by OUTPUT ENABLE."
      },
      {
        "number": "12",
        "name": "Q7",
        "type": "tri_state",
        "description": "3-state buffered parallel output of shift-register stage 7, driven from the storage register and enabled by OUTPUT ENABLE."
      },
      {
        "number": "13",
        "name": "Q6",
        "type": "tri_state",
        "description": "3-state buffered parallel output of shift-register stage 6, driven from the storage register and enabled by OUTPUT ENABLE."
      },
      {
        "number": "14",
        "name": "Q5",
        "type": "tri_state",
        "description": "3-state buffered parallel output of shift-register stage 5, driven from the storage register and enabled by OUTPUT ENABLE."
      },
      {
        "number": "15",
        "name": "OUTPUT ENABLE",
        "type": "input",
        "description": "Output-enable control input; when high, the data in the storage register appears at the Q1-Q8 parallel outputs, otherwise the outputs are placed in the high-impedance (open-circuit) state."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply-voltage pin, referenced to VSS, with a recommended operating range of 3 V to 18 V (absolute maximum -0.5 V to +20 V)."
      }
    ],
    "provenance": {
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        "cost_usd": 0.5645,
        "at": "2026-09-22T21:23:20"
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      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/cd4094b.pdf",
        "pages": 18,
        "sha256": "52741c14b853b678",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
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    },
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        "zmin_mm": -0.0,
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        "checked": "2026-10-07",
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}