CD4094B

{
  "schema_version": 1,
  "type": "component",
  "slug": "cd4094b",
  "title": "CD4094B",
  "brief": "TI 8-stage serial shift register with output latch and 3-state outputs, SOIC-16. Like a CMOS 74HC595. 3-18 V. Datasheet-verified.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "shift-register",
    "serial-to-parallel",
    "4094",
    "soic-16",
    "texas-instruments"
  ],
  "component": {
    "mpn": "CD4094B",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Logic IC",
    "subcategory": "8-stage shift-and-store register",
    "datasheet": "https://www.ti.com/lit/ds/symlink/cd4094b.pdf",
    "parts": {
      "symbol": "cd4094b.kicad_sym",
      "footprint": "cd4094b.kicad_mod",
      "model_3d": "cd4094b-etched.glb",
      "model_3d_plain": "cd4094b.glb",
      "lbr": "cd4094b.lbr",
      "model_3d_step": "cd4094b-etched.step",
      "model_3d_step_plain": "cd4094b.step"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "STROBE",
        "type": "input",
        "description": "Storage-register strobe input. When held high, data in the shift register is transferred to the 8-bit storage latch and appears on Q1-Q8 (subject to OUTPUT ENABLE). Held low, the storage latch retains its previous state."
      },
      {
        "number": "2",
        "name": "DATA",
        "type": "input",
        "description": "Serial data input. Sampled into stage 1 of the shift register on each positive edge of CLOCK."
      },
      {
        "number": "3",
        "name": "CLOCK",
        "type": "input",
        "description": "Clock input for the 8-stage serial shift register. Data on the DATA input is shifted into the register on the positive-going edge. Minimum clock pulse width tW=100 ns typ at VDD=10 V; fCL max=2.5 MHz at VDD=10 V."
      },
      {
        "number": "4",
        "name": "Q1",
        "type": "tri_state",
        "description": "3-state parallel output for shift-register stage 1 (via the storage latch). Enabled when OUTPUT ENABLE is high; open-circuit when OUTPUT ENABLE is low."
      },
      {
        "number": "5",
        "name": "Q2",
        "type": "tri_state",
        "description": "3-state parallel output for shift-register stage 2 (via the storage latch). Enabled when OUTPUT ENABLE is high; open-circuit when OUTPUT ENABLE is low."
      },
      {
        "number": "6",
        "name": "Q3",
        "type": "tri_state",
        "description": "3-state parallel output for shift-register stage 3 (via the storage latch). Enabled when OUTPUT ENABLE is high; open-circuit when OUTPUT ENABLE is low."
      },
      {
        "number": "7",
        "name": "Q4",
        "type": "tri_state",
        "description": "3-state parallel output for shift-register stage 4 (via the storage latch). Enabled when OUTPUT ENABLE is high; open-circuit when OUTPUT ENABLE is low."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply / ground reference. Tie to 0 V."
      },
      {
        "number": "9",
        "name": "Q'S",
        "type": "output",
        "description": "Serial cascade output taken from the shift-register stage 8 on the NEXT NEGATIVE clock edge. Used to cascade a following CD4094B when the clock rise time is slow (allows the receiving device more setup time)."
      },
      {
        "number": "10",
        "name": "QS",
        "type": "output",
        "description": "Serial cascade output taken from shift-register stage 8 on the POSITIVE clock edge. Used to cascade a following CD4094B for high-speed operation when the clock rise time is fast."
      },
      {
        "number": "11",
        "name": "Q8",
        "type": "tri_state",
        "description": "3-state parallel output for shift-register stage 8 (via the storage latch). Enabled when OUTPUT ENABLE is high; open-circuit when OUTPUT ENABLE is low."
      },
      {
        "number": "12",
        "name": "Q7",
        "type": "tri_state",
        "description": "3-state parallel output for shift-register stage 7 (via the storage latch). Enabled when OUTPUT ENABLE is high; open-circuit when OUTPUT ENABLE is low."
      },
      {
        "number": "13",
        "name": "Q6",
        "type": "tri_state",
        "description": "3-state parallel output for shift-register stage 6 (via the storage latch). Enabled when OUTPUT ENABLE is high; open-circuit when OUTPUT ENABLE is low."
      },
      {
        "number": "14",
        "name": "Q5",
        "type": "tri_state",
        "description": "3-state parallel output for shift-register stage 5 (via the storage latch). Enabled when OUTPUT ENABLE is high; open-circuit when OUTPUT ENABLE is low."
      },
      {
        "number": "15",
        "name": "OUTPUT_ENABLE",
        "type": "input",
        "description": "Output-enable input for the 3-state parallel outputs Q1-Q8. High = outputs driven (enabled); Low = outputs high-impedance (open circuit). Allows Q1-Q8 to be tied directly to a common bus."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply. Operating range VDD-VSS = 3 V to 18 V (absolute max -0.5 V to +20 V). Bypass with a local decoupling capacitor."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/cd4094b.pdf",
        "pages": 18,
        "sha256": "e64a88bc0597c967",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "CD4094",
      "logic_family": "CD4000",
      "function_code": "4094",
      "function_class": "ShiftRegister",
      "function_name": "8-Bit SIPO Shift Register with Output Latch",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
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        "file": "cd4094b.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4094b-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f5475375c7a52b9484683f8e6d31d27b2f6c8eddbf1333a4a1177a27b634dbcd",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Type": "8-stage shift-and-store register",
      "Data path": "serial in, parallel out (Q1-Q8)",
      "Latch": "STROBE transfers shift to output",
      "Outputs": "3-state + serial (QS, Q'S)",
      "Cascade": "yes (QS to next DATA)",
      "Logic family": "4000B CMOS",
      "Supply voltage": "3-18 V",
      "Package": "SOIC-16"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cd4094b",
    "cd4094",
    "shift register",
    "serial to parallel",
    "4094 latch"
  ],
  "discovery_pitch": "CD4094B 8-stage shift-and-store register (SOIC-16) with datasheet-verified pinout, KiCad footprint/3D, and full provenance.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4094b.kicad_sym",
    "cd4094b.kicad_mod",
    "cd4094b.glb",
    "cd4094b.lbr",
    "docs/hero.png",
    "docs/cd4094b-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cd4094b-etched.step"
  ],
  "variants": [
    {
      "mpn": "CD4094BM (SOIC-16, tube)",
      "kind": "packaging"
    },
    {
      "mpn": "CD4094BM96 (SOIC-16, tape & reel)",
      "kind": "packaging"
    }
  ]
}