CD4093BM96

{
 "schema": "adom.pads/1",
 "slug": "cd4093bm96",
 "footprint": "SOIC-14_3.9x8.7mm_P1.27mm",
 "generated_from": {
  "footprint": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -3.81
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9"
 },
 "pad_count": 14,
 "symbol_pins": [
  "1",
  "10",
  "11",
  "12",
  "13",
  "14",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8",
  "9"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "1A",
   "type": "input",
   "description": "Schmitt-trigger input A of NAND gate 1. High-impedance CMOS input protected by internal diode network; typical input current 10 pA. Hysteresis (VP-VN) ~0.9 V at VDD=5 V, ~2.3 V at VDD=10 V.",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "1B",
   "type": "input",
   "description": "Schmitt-trigger input B of NAND gate 1. High-impedance CMOS input; unused inputs must be tied to VDD or VSS (not floated). Same hysteresis characteristics as pin 1.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "1J",
   "type": "output",
   "description": "NAND output of gate 1 (J = A·B, i.e. NAND of pins 1 and 2). Standardized symmetrical CMOS output; typical IOL/IOH ~1 mA at VDD=5 V, rising with supply.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.0
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "2K",
   "type": "output",
   "description": "NAND output of gate 2 (K = C·D, NAND of pins 5 and 6). Symmetrical CMOS push-pull output.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "2C",
   "type": "input",
   "description": "Schmitt-trigger input C of NAND gate 2. Same characteristics as pin 1.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "2D",
   "type": "input",
   "description": "Schmitt-trigger input D of NAND gate 2. Same characteristics as pin 1.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "VSS",
   "type": "power_in",
   "description": "Negative supply / ground reference (0 V). All logic levels and hysteresis thresholds are referenced to VSS.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "3E",
   "type": "input",
   "description": "Schmitt-trigger input E of NAND gate 3. Same characteristics as pin 1.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "9",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "9",
   "name": "3F",
   "type": "input",
   "description": "Schmitt-trigger input F of NAND gate 3. Same characteristics as pin 1.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "10",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "10",
   "name": "3L",
   "type": "output",
   "description": "NAND output of gate 3 (L = E·F, NAND of pins 8 and 9). Symmetrical CMOS push-pull output.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "11",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.0
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "11",
   "name": "4M",
   "type": "output",
   "description": "NAND output of gate 4 (M = G·H, NAND of pins 12 and 13). Symmetrical CMOS push-pull output.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "12",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "12",
   "name": "4G",
   "type": "input",
   "description": "Schmitt-trigger input G of NAND gate 4. Same characteristics as pin 1.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "13",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "13",
   "name": "4H",
   "type": "input",
   "description": "Schmitt-trigger input H of NAND gate 4. Same characteristics as pin 1.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "14",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "14",
   "name": "VDD",
   "type": "power_in",
   "description": "Positive supply. Recommended operating range 3 V to 18 V (absolute max -0.5 V to +20 V referenced to VSS). Bypass with a decoupling capacitor close to the pin.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}