CD4093BM

{
 "schema": "adom.pads/1",
 "slug": "cd4093bm",
 "footprint": "SOIC-14_3.9x8.7mm_P1.27mm",
 "generated_from": {
  "footprint": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -3.81
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9"
 },
 "pad_count": 14,
 "symbol_pins": [
  "1",
  "10",
  "11",
  "12",
  "13",
  "14",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8",
  "9"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "A",
   "type": "input",
   "description": "Gate 1 input A. Schmitt-trigger input of the first 2-input NAND gate. Typical VP=3.2 V and VN=1.8 V at VDD=5 V (hysteresis ~1.4 V).",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "B",
   "type": "input",
   "description": "Gate 1 input B. Schmitt-trigger input of the first 2-input NAND gate. NAND output J = NOT(A AND B).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "J",
   "type": "output",
   "description": "Gate 1 NAND output (J = NOT(A·B)). CMOS push-pull output, IOH ~ -1.8 mA at VDD=5 V; IOL ~ 3.6 mA at VDD=5 V.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.0
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "K",
   "type": "output",
   "description": "Gate 2 NAND output (K = NOT(C·D)). CMOS push-pull output driven by Schmitt-trigger inputs C and D.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "C",
   "type": "input",
   "description": "Gate 2 input C. Schmitt-trigger input of the second 2-input NAND gate; pairs with input D to drive output K.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "D",
   "type": "input",
   "description": "Gate 2 input D. Schmitt-trigger input of the second 2-input NAND gate; pairs with input C to drive output K.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "VSS",
   "type": "power_in",
   "description": "Negative supply / ground reference (0 V). Absolute maximum VDD-VSS is 20 V; recommended operating range 3.0 V to 15 V (up to 18 V absolute max).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "E",
   "type": "input",
   "description": "Gate 3 input E. Schmitt-trigger input of the third 2-input NAND gate; pairs with input F to drive output L.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "9",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "9",
   "name": "F",
   "type": "input",
   "description": "Gate 3 input F. Schmitt-trigger input of the third 2-input NAND gate; pairs with input E to drive output L.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "10",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "10",
   "name": "L",
   "type": "output",
   "description": "Gate 3 NAND output (L = NOT(E·F)). CMOS push-pull output driven by Schmitt-trigger inputs E and F.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "11",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.0
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "11",
   "name": "M",
   "type": "output",
   "description": "Gate 4 NAND output (M = NOT(G·H)). CMOS push-pull output driven by Schmitt-trigger inputs G and H.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "12",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "12",
   "name": "G",
   "type": "input",
   "description": "Gate 4 input G. Schmitt-trigger input of the fourth 2-input NAND gate; pairs with input H to drive output M.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "13",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "13",
   "name": "H",
   "type": "input",
   "description": "Gate 4 input H. Schmitt-trigger input of the fourth 2-input NAND gate; pairs with input G to drive output M.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "14",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "14",
   "name": "VDD",
   "type": "power_in",
   "description": "Positive supply. Recommended operating range 3.0 V to 15 V; absolute maximum 20 V (spec limit 18 V). Input leakage IIN ≤ 1.2 µA and quiescent IDD ≤ 1.2 µA at VDD=18 V, Ta=25 °C.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}