component

CD4093BDRG

Public Made by Adom

by adom

HANSCHIP semiconductor Gates, SOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentlogiccd4093bdrg
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10 commits ← Back to file
cd4093bdrg: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
Ray · 5d8bc55 ·
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
Ray · d06da4f ·
cd4093bdrg: laser-etched CAD + chip hero (factory 2.0.0 backfill)
Ray · fa21341 ·
cd4093bdrg: stamp component.logic (CD4093) from component-ocean
Ray · 930b77d ·
cd4093bdrg: backfill missing artifacts (variants)
Ray · 55d8325 ·
cd4093bdrg: publish the laser-etched STEP alongside the bare one
Ray · 1990425 ·
Publish 0.2.0
Ray · 7869811 ·
Set visibility: public
Ray · 07e9785 ·
cd4093bdrg: factory component page (tier=lcsc)
Ray · d990042 ·
Initial commit: component/cd4093bdrg
Ray · 10447e8 ·