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CD4082BPWR

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Texas Instruments Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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CD4082BPWR

Texas Instruments · Logic Gates · TSSOP-14

CD4082BPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 J output Output of AND gate 1 (inputs A, B, C, D), per the CD4082B functional diagram.
2 D input Gate 1 input D; input voltage range -0.5 V to VDD+0.5 V, DC input current ±10 mA max.
3 C input Gate 1 input C; input voltage range -0.5 V to VDD+0.5 V, DC input current ±10 mA max.
4 B input Gate 1 input B; input voltage range -0.5 V to VDD+0.5 V, DC input current ±10 mA max.
5 A input Gate 1 input A; input voltage range -0.5 V to VDD+0.5 V, DC input current ±10 mA max.
6 NC unconnected Not shown on the CD4082B functional diagram; no internal connection indicated.
7 VSS power_in Ground / negative supply terminal; VDD is referenced to VSS.
8 NC unconnected Not shown on the CD4082B functional diagram; no internal connection indicated.
9 E input Gate 2 input E; input voltage range -0.5 V to VDD+0.5 V, DC input current ±10 mA max.
10 F input Gate 2 input F; input voltage range -0.5 V to VDD+0.5 V, DC input current ±10 mA max.
11 G input Gate 2 input G; input voltage range -0.5 V to VDD+0.5 V, DC input current ±10 mA max.
12 H input Gate 2 input H; input voltage range -0.5 V to VDD+0.5 V, DC input current ±10 mA max.
13 K output Output of AND gate 2 (inputs E, F, G, H), per the CD4082B functional diagram.
14 VDD power_in Positive supply; recommended 3 V to 18 V, absolute maximum -0.5 V to +20 V referenced to VSS.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD4082BPWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: cd4082bpwr-etched.step / cd4082bpwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4082bpwr.step / cd4082bpwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 68c6167d1ae45286, retrieved 2026-10-01, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF