component
CD4081S
Public Made by Adomby adom
GR Gates, SOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+55@@ -0,0 +1,55 @@+# CD4081S++**GR** · Gates · SOP-14++CD4081S from GR, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A | input | Input A of gate 1 (J = A AND B). CMOS logic input, high-impedance, IIN <= 1 uA @ VIN=VDD=18V. |+| 2 | B | input | Input B of gate 1 (J = A AND B). CMOS logic input, high-impedance. |+| 3 | J | output | Output J of gate 1 (J = A AND B). CMOS push-pull output; VOH >= VDD-0.05 V and VOL <= 0.05 V at |IOUT| < 1 uA. |+| 4 | K | output | Output K of gate 2 (K = C AND D). CMOS push-pull output. |+| 5 | C | input | Input C of gate 2 (K = C AND D). CMOS logic input. |+| 6 | D | input | Input D of gate 2 (K = C AND D). CMOS logic input. |+| 7 | VSS | power_in | Negative supply / ground reference (0 V). Absolute maximum supply range -0.5 V to +20 V. |+| 8 | E | input | Input E of gate 3 (L = E AND F). CMOS logic input. |+| 9 | F | input | Input F of gate 3 (L = E AND F). CMOS logic input. |+| 10 | L | output | Output L of gate 3 (L = E AND F). CMOS push-pull output. |+| 11 | M | output | Output M of gate 4 (M = G AND H). CMOS push-pull output. |+| 12 | G | input | Input G of gate 4 (M = G AND H). CMOS logic input. |+| 13 | H | input | Input H of gate 4 (M = G AND H). CMOS logic input. |+| 14 | VDD | power_in | Positive supply. Recommended operating range 3 V to 18 V; absolute max -0.5 V to +20 V. Typical IDD = 0.01 uA @ VDD = 18V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | GR |+| Package | SOP-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++- `CD4081SS`+- `CD4081SD`++## CAD (KiCad official)++- Symbol: `CD4081S`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOP-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [GR datasheet](docs/cd4081s-datasheet.pdf) (6 pp, sha256 `72042b18c3cbd810`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4081s-datasheet.pdf)
page.jsonadded+34@@ -0,0 +1,34 @@+{+ "slug": "cd4081s",+ "version": "0.1.0",+ "type": "component",+ "description": "GR Gates, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd4081s"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd4081s.kicad_sym",+ "cd4081s.kicad_mod",+ "cd4081s.glb",+ "cd4081s.step",+ "cd4081s.lbr",+ "docs/hero.png",+ "docs/cd4081s-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "visibility": "public",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}