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docs cd4081bm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
cd4081bm96-etched.fit.json cd4081bm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
cd4081bm96-etched.glb cd4081bm96: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray 15d ago
cd4081bm96-etched.step cd4081bm96: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray 15d ago
cd4081bm96.glb Publish 0.1.0 · Ray 2mo ago
cd4081bm96.kicad_mod Publish 0.1.0 · Ray 2mo ago
cd4081bm96.kicad_sym Publish 0.1.0 · Ray 2mo ago
cd4081bm96.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray 2mo ago
cd4081bm96.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.2.0 · Ray 2mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
page.json cd4081bm96: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray 15d ago
README.md cd4081bm96: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

CD4081BM96

Texas Instruments · Gates · SOIC-14

CD4081BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Gate 1 input A. CMOS logic input to the first 2-input AND gate; drives output 1Y = 1A AND 1B. Protected by CMOS input protection network.
2 1B input Gate 1 input B. CMOS logic input to the first 2-input AND gate; drives output 1Y = 1A AND 1B.
3 1Y output Gate 1 output (1A AND 1B). Standardized symmetrical CMOS output; can source/sink typ 1.3 mA at VDD=5 V.
4 2Y output Gate 2 output (2A AND 2B). Standardized symmetrical CMOS output.
5 2A input Gate 2 input A. CMOS logic input to the second 2-input AND gate.
6 2B input Gate 2 input B. CMOS logic input to the second 2-input AND gate.
7 VSS power_in Negative supply / ground reference. Typically 0 V.
8 3A input Gate 3 input A. CMOS logic input to the third 2-input AND gate.
9 3B input Gate 3 input B. CMOS logic input to the third 2-input AND gate.
10 3Y output Gate 3 output (3A AND 3B). Standardized symmetrical CMOS output.
11 4Y output Gate 4 output (4A AND 4B). Standardized symmetrical CMOS output.
12 4A input Gate 4 input A. CMOS logic input to the fourth 2-input AND gate.
13 4B input Gate 4 input B. CMOS logic input to the fourth 2-input AND gate.
14 VDD power_in Positive supply. Recommended operating range 3 V to 18 V; absolute maximum -0.5 V to +20 V referenced to VSS.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • CD4081BM96
  • CD4081BM96E4
  • CD4081BM96G4
  • CD4081BM96BME4
  • CD4081BM96BMG4
  • CD4081BM96BMT
  • CD4081BM96BMTE4
  • CD4081BM96BMTG4
  • CD4081BM96BNSR
  • CD4081BM96BNSRE4
  • CD4081BM96BNSRG4
  • CD4081BM96BPW
  • CD4081BM96BPWE4
  • CD4081BM96BPWG4
  • CD4081BM96BPWR
  • CD4081BM96BPWRE4
  • CD4081BM96BPWRG4
  • CD4081BM96BE
  • CD4081BM96BEE4
  • CD4081BM96BF
  • CD4081BM96BF3A
  • CD4081BM96BF3AS2534

CAD (KiCad official)

  • Symbol: CD4081BM96
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: cd4081bm96-etched.step / cd4081bm96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4081bm96.step / cd4081bm96.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
cd4081bm96.step 195 KB You want the bare part, or you mark your own boards.
cd4081bm96-etched.step 2.7 MB You want the part with CD4081BM96 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 653 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 f062f30feb060901, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF