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CD4078BPW

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Texas Instruments Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Datasheet

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Contents

README

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CD4078BPW

Texas Instruments · Logic Gates · TSSOP-14

CD4078BPW from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 K output 8-input OR output; HIGH when any of inputs A-H is HIGH (K = A+B+C+D+E+F+G+H); CMOS totem-pole, VDD 3 V to 18 V.
2 A input Logic input A; one of eight inputs to the 8-input NOR/OR gate; unused inputs must be connected to VDD or VSS; max input current ±10 nA.
3 B input Logic input B; one of eight inputs to the 8-input NOR/OR gate; unused inputs must be connected to VDD or VSS.
4 C input Logic input C; one of eight inputs to the 8-input NOR/OR gate; unused inputs must be connected to VDD or VSS.
5 D input Logic input D; one of eight inputs to the 8-input NOR/OR gate; unused inputs must be connected to VDD or VSS.
6 NC unconnected No internal connection; leave unconnected or connect to VDD or VSS.
7 VSS power_in Negative supply (ground) terminal; 0 V reference; VDD-VSS supply range 3 V to 18 V, operating -55°C to 125°C.
8 NC unconnected No internal connection; leave unconnected or connect to VDD or VSS.
9 E input Logic input E; one of eight inputs to the 8-input NOR/OR gate; unused inputs must be connected to VDD or VSS.
10 F input Logic input F; one of eight inputs to the 8-input NOR/OR gate; unused inputs must be connected to VDD or VSS.
11 G input Logic input G; one of eight inputs to the 8-input NOR/OR gate; unused inputs must be connected to VDD or VSS.
12 H input Logic input H; one of eight inputs to the 8-input NOR/OR gate; unused inputs must be connected to VDD or VSS.
13 ~J output 8-input NOR output; complement of OR output K; LOW when any of inputs A-H is HIGH (~J = NOT(A+B+C+D+E+F+G+H)); CMOS totem-pole.
14 VDD power_in Positive supply voltage terminal; 3 V to 18 V referenced to VSS; quiescent device current 0.25 µA max at 18 V, 25°C.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD4078BPW
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: cd4078bpw-etched.step / cd4078bpw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4078bpw.step / cd4078bpw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (20 pp, sha256 d1d07c50981c9d3a, retrieved 2026-10-01, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-4-6 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF