component
CD4078BM
Public Made by Adomby adom
HGSEMI Logic Gates, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 7d ago |
| viewers | 7d ago |
| cd4078bm-etched.glb | 7d ago |
| cd4078bm-etched.step | 7d ago |
| cd4078bm-hero.glb | 7d ago |
| cd4078bm-hero.overlay.json | 7d ago |
| cd4078bm.glb | 7d ago |
| cd4078bm.kicad_mod | 7d ago |
| cd4078bm.kicad_sym | 7d ago |
| cd4078bm.lbr | 7d ago |
| cd4078bm.step | 7d ago |
| package.json | 7d ago |
| page.json | 7d ago |
| README.md | 7d ago |
CD4078BM
HGSEMI · Logic Gates · SOP-14
CD4078BM from HGSEMI, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | output | Buffered NOR output, K = NOT(A+B+C+D+E+F+G+H). |
| 2 | A | input | Buffered gate input A; input voltage range -0.5V to VDD+0.5V. |
| 3 | B | input | Buffered gate input B; input voltage range -0.5V to VDD+0.5V. |
| 4 | C | input | Buffered gate input C; input voltage range -0.5V to VDD+0.5V. |
| 5 | D | input | Buffered gate input D; input voltage range -0.5V to VDD+0.5V. |
| 6 | NC | unconnected | No connection. |
| 7 | VSS | power_in | Ground/negative supply terminal; all voltages are referenced to VSS. |
| 8 | NC | unconnected | No connection. |
| 9 | E | input | Buffered gate input E; input voltage range -0.5V to VDD+0.5V. |
| 10 | F | input | Buffered gate input F; input voltage range -0.5V to VDD+0.5V. |
| 11 | G | input | Buffered gate input G; input voltage range -0.5V to VDD+0.5V. |
| 12 | H | input | Buffered gate input H; input voltage range -0.5V to VDD+0.5V. |
| 13 | J | output | Buffered OR output, J = A+B+C+D+E+F+G+H. |
| 14 | VDD | power_in | Positive supply voltage, 5V to 18V recommended, 20V absolute maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage Range (For TA Full Package Temperature Range) | VDD | 5 | 18 | V | For TA full package temperature range | 2 | |
| Voltages referenced to VSS terminal | -0.5 | 20 | V | 2 | |||
| Input voltage range, all inputs | -0.5 | V | Printed max Vdd+0.5 V (expression, not numeric) | 2 | |||
| DC input current, any one input | -10 | 10 | mA | Printed ±10 mA | 2 | ||
| Device dissipation per output transistor | 100 | mW | For TA = full package-temperature range (all package types) | 2 | |||
| Operating-temperature range (TA) | TA | -40 | 85 | ℃ | 2 | ||
| Storage temperature range (Tstg) | Tstg | -65 | 150 | ℃ | 2 | ||
| Lead temperature (during soldering) | 265 | ℃ | At distance 1/16±1/32 inch (1.59+0.79 mm) from case for 10 s max | 2 | |||
| Propagation Delay Time, tPHL,tPLH | tPHL,tPLH | 150 | 300 | ns | VDD=5 V, TA=25℃, tr/tf=20 ns, CL=50 pF, RL=200kΩ | 3 | |
| Propagation Delay Time, tPHL,tPLH | tPHL,tPLH | 75 | 150 | ns | VDD=10 V, TA=25℃, tr/tf=20 ns, CL=50 pF, RL=200kΩ | 3 | |
| Propagation Delay Time, tPHL,tPLH | tPHL,tPLH | 55 | 110 | ns | VDD=15 V, TA=25℃, tr/tf=20 ns, CL=50 pF, RL=200kΩ | 3 | |
| Input Capacitance | CIN | 5 | 7.5 | pF | Any input | 3 | |
| Quiescent Device Current | IDD | 0.25 | µA | VIN 0.5, VDD 5 V, TA=-40℃ | 3 | ||
| Quiescent Device Current | IDD | 7.5 | µA | VIN 0.5, VDD 5 V, TA=+85℃ | 3 | ||
| Quiescent Device Current | IDD | 0.01 | 0.25 | µA | VIN 0.5, VDD 5 V, TA=+25℃ | 3 | |
| Quiescent Device Current | IDD | 0.5 | µA | VIN 0.10, VDD 10 V, TA=-40℃ | 3 | ||
| Quiescent Device Current | IDD | 15 | µA | VIN 0.10, VDD 10 V, TA=+85℃ | 3 | ||
| Quiescent Device Current | IDD | 0.01 | 0.5 | µA | VIN 0.10, VDD 10 V, TA=+25℃ | 3 | |
| Quiescent Device Current | IDD | 1 | µA | VIN 0.15, VDD 15 V, TA=-40℃ | 3 | ||
| Quiescent Device Current | IDD | 30 | µA | VIN 0.15, VDD 15 V, TA=+85℃ | 3 | ||
| Quiescent Device Current | IDD | 0.01 | 1 | µA | VIN 0.15, VDD 15 V, TA=+25℃ | 3 | |
| Quiescent Device Current | IDD | 5 | µA | VIN 0.20, VDD 20 V, TA=-40℃ | 3 | ||
| Quiescent Device Current | IDD | 150 | µA | VIN 0.20, VDD 20 V, TA=+85℃ | 3 | ||
| Quiescent Device Current | IDD | 0.02 | 5 | µA | VIN 0.20, VDD 20 V, TA=+25℃ | 3 | |
| Output Low (Sink) Current | IOL | 0.61 | mA | VO 0.4, VIN 0.5, VDD 5 V, TA=-40℃ | 3 | ||
| Output Low (Sink) Current | IOL | 0.42 | mA | VO 0.4, VIN 0.5, VDD 5 V, TA=+85℃ | 3 | ||
| Output Low (Sink) Current | IOL | 0.51 | 1 | mA | VO 0.4, VIN 0.5, VDD 5 V, TA=+25℃ | 3 | |
| Output Low (Sink) Current | IOL | 1.5 | mA | VO 0.5, VIN 0.10, VDD 10 V, TA=-40℃ | 3 | ||
| Output Low (Sink) Current | IOL | 1.1 | mA | VO 0.5, VIN 0.10, VDD 10 V, TA=+85℃ | 3 | ||
| Output Low (Sink) Current | IOL | 1.3 | 2.6 | mA | VO 0.5, VIN 0.10, VDD 10 V, TA=+25℃ | 3 | |
| Output Low (Sink) Current | IOL | 4 | mA | VO 1.5, VIN 0.15, VDD 15 V, TA=-40℃ | 3 | ||
| Output Low (Sink) Current | IOL | 2.8 | mA | VO 1.5, VIN 0.15, VDD 15 V, TA=+85℃ | 3 | ||
| Output Low (Sink) Current | IOL | 3.4 | 6.8 | mA | VO 1.5, VIN 0.15, VDD 15 V, TA=+25℃ | 3 | |
| Output High (Source) Current | IOH | -0.61 | mA | VO 4.6, VIN 0.5, VDD 5 V, TA=-40℃ | 3 | ||
| Output High (Source) Current | IOH | -0.42 | mA | VO 4.6, VIN 0.5, VDD 5 V, TA=+85℃ | 3 | ||
| Output High (Source) Current | IOH | -0.51 | -1 | mA | VO 4.6, VIN 0.5, VDD 5 V, TA=+25℃ | 3 | |
| Output High (Source) Current | IOH | -1.8 | mA | VO 2.5, VIN 0.5, VDD 5 V, TA=-40℃ | 3 | ||
| Output High (Source) Current | IOH | -1.3 | mA | VO 2.5, VIN 0.5, VDD 5 V, TA=+85℃ | 3 | ||
| Output High (Source) Current | IOH | -1.6 | -3.2 | mA | VO 2.5, VIN 0.5, VDD 5 V, TA=+25℃ | 3 | |
| Output High (Source) Current | IOH | -1.5 | mA | VO 9.5, VIN 0.10, VDD 10 V, TA=-40℃ | 3 | ||
| Output High (Source) Current | IOH | -1.1 | mA | VO 9.5, VIN 0.10, VDD 10 V, TA=+85℃ | 3 | ||
| Output High (Source) Current | IOH | -1.3 | -2.6 | mA | VO 9.5, VIN 0.10, VDD 10 V, TA=+25℃ | 3 | |
| Output High (Source) Current | IOH | -4 | mA | VO 13.5, VIN 0.15, VDD 15 V, TA=-40℃ | 3 | ||
| Output High (Source) Current | IOH | -2.8 | mA | VO 13.5, VIN 0.15, VDD 15 V, TA=+85℃ | 3 | ||
| Output High (Source) Current | IOH | -3.4 | -6.8 | mA | VO 13.5, VIN 0.15, VDD 15 V, TA=+25℃ | 3 | |
| Output Voltage Low Level | VOL | 0 | 0.05 | V | VIN 0.5, VDD 5 V | 3 | |
| Output Voltage High Level | VOH | 4.95 | 5 | V | VIN 0.5, VDD 5 V | 3 | |
| Output Voltage High Level | VOH | 9.95 | 10 | V | VIN 0.10, VDD 10 V | 3 | |
| Output Voltage High Level | VOH | 14.95 | 15 | V | VIN 0.15, VDD 15 V | 3 | |
| Input Low Voltage | VIL | 1.5 | V | VO 0.5 / 4.5 V, VDD 5 V | 3 | ||
| Input Low Voltage | VIL | 3 | V | VO 1.9 V, VDD 10 V | 3 | ||
| Input Low Voltage | VIL | 4 | V | VO 1.5 / 13.5 V, VDD 15 V | 3 | ||
| Input High Voltage | VIN | 3.5 | V | VO 0.5 / 4.5 V, VDD 5 V | 3 | ||
| Input High Voltage | VIN | 7 | V | VO 1.9 V, VDD 10 V | 3 | ||
| Input High Voltage | VIN | 11 | V | VO 1.5 / 13.5 V, VDD 15 V | 3 | ||
| Input Current | IIN | -0.1 | 0.1 | µA | VIN 0.18, VDD 18 V, TA=-40℃ | 3 | |
| Input Current | IIN | -1 | 1 | µA | VIN 0.18, VDD 18 V, TA=+85℃ | 3 |
CAD (KiCad official)
- Symbol:
CD4078BM - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
cd4078bm-etched.step/cd4078bm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4078bm.step/cd4078bm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (9 pp, sha256
24fcfd3f10a371fd, retrieved 2026-10-15, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).