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CD4078BE

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HGSEMI Logic Gates, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CD4078BE

HGSEMI · Logic Gates · DIP-14

CD4078BE from HGSEMI, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 K output Buffered OR output, K = A+B+C+D+E+F+G+H.
2 A input Buffered gate input A; input voltage range -0.5V to VDD+0.5V.
3 B input Buffered gate input B; input voltage range -0.5V to VDD+0.5V.
4 C input Buffered gate input C; input voltage range -0.5V to VDD+0.5V.
5 D input Buffered gate input D; input voltage range -0.5V to VDD+0.5V.
6 NC unconnected No connection.
7 VSS power_in Ground/negative supply terminal; all voltages are referenced to VSS.
8 NC unconnected No connection.
9 E input Buffered gate input E; input voltage range -0.5V to VDD+0.5V.
10 F input Buffered gate input F; input voltage range -0.5V to VDD+0.5V.
11 G input Buffered gate input G; input voltage range -0.5V to VDD+0.5V.
12 H input Buffered gate input H; input voltage range -0.5V to VDD+0.5V.
13 J output Buffered NOR output, J = NOT(A+B+C+D+E+F+G+H).
14 VDD power_in Positive supply; recommended 5V to 18V, absolute maximum +20V referenced to VSS.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package DIP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage Range (for TA full package temperature range) 5 18 V For TA full package temperature range 2
Operating temperature range TA -40 85 °C 2
Supply voltage referenced to VSS terminal -0.5 20 V Voltages referenced to VSS terminal 2
Input voltage range, all inputs -0.5 V Printed as Vdd+0.5V; max not numeric 2
DC input current, any one input -10 10 mA Any one input 2
Device dissipation per output transistor 100 mW For TA = full package-temperature range (all package types) 2
Storage temperature range Tstg -65 150 °C 2
Lead temperature (during soldering) 265 °C At distance 1/16±1/32 inch (1.59 mm) from case for 10 s max 2
Propagation delay time tPHL, tPLH tPHL,tPLH 150 300 ns TA=25°C, tr tf=20 ns, CL=50 pF, RL=200 kΩ, VDD=5 V 3
Propagation delay time tPHL, tPLH tPHL,tPLH 75 150 ns TA=25°C, tr tf=20 ns, CL=50 pF, RL=200 kΩ, VDD=10 V 3
Propagation delay time tPHL, tPLH tPHL,tPLH 55 110 ns TA=25°C, tr tf=20 ns, CL=50 pF, RL=200 kΩ, VDD=15 V 3
Propagation time tPHL, tPLH (second row, see review) tPHL,tPLH 200 ns TA=25°C, tr tf=20 ns, CL=50 pF, RL=200 kΩ, VDD=5 V 3
Propagation time tPHL, tPLH (second row, see review) tPHL,tPLH 100 ns TA=25°C, tr tf=20 ns, CL=50 pF, RL=200 kΩ, VDD=10 V 3
Propagation time tPHL, tPLH (second row, see review) tPHL,tPLH 80 ns TA=25°C, tr tf=20 ns, CL=50 pF, RL=200 kΩ, VDD=15 V 3
Input capacitance CIN 7.5 pF Any input, VDD=5 V 3
Quiescent device current, max at +25°C IDD 0.25 µA VDD=5 V, TA=+25°C 3
Quiescent device current, max at +85°C (worst case) IDD 7.5 µA VDD=5 V, worst case over -40 to +85°C 3
Quiescent device current, max at +25°C IDD 0.5 µA VDD=10 V, TA=+25°C 3
Quiescent device current, max at +85°C (worst case) IDD 15 µA VDD=10 V, worst case over -40 to +85°C 3
Quiescent device current, max at +25°C IDD 1 µA VDD=15 V, TA=+25°C 3
Quiescent device current, max at +85°C (worst case) IDD 30 µA VDD=15 V, worst case over -40 to +85°C 3
Quiescent device current, max at +25°C IDD 5 µA VDD=20 V, TA=+25°C 3
Quiescent device current, max at +85°C (worst case) IDD 150 µA VDD=20 V, worst case over -40 to +85°C 3
Output low (sink) current IOL 0.42 mA VO=0.4 V, VIN=0.5 V, VDD=5 V; lowest printed value across temperatures 3
Output low (sink) current IOL 1.1 mA VO=0.5 V, VIN=0.10 V, VDD=10 V; lowest printed value across temperatures 3
Output low (sink) current IOL 2.8 mA VO=1.5 V, VIN=0.15 V, VDD=15 V; lowest printed value across temperatures 3
Output high (source) current IOH -0.42 mA VO=4.6 V, VIN=0.5 V, VDD=5 V; smallest-magnitude printed value across temperatures 3
Output high (source) current IOH -1.3 mA VO=2.5 V, VIN=0.5 V, VDD=5 V; smallest-magnitude printed value across temperatures 3
Output high (source) current IOH -1.1 mA VO=9.5 V, VIN=0.10 V, VDD=10 V; smallest-magnitude printed value across temperatures 3
Output high (source) current IOH -2.8 mA VO=13.5 V, VIN=0.15 V, VDD=15 V; smallest-magnitude printed value across temperatures 3
Output voltage low level VOL 0 0.05 V VIN=0.5 V, VDD=5 V 3
Output voltage high level VOH 4.95 5 V VIN=0.5 V, VDD=5 V 3
Output voltage high level VOH 9.95 10 V VIN=0.10 V, VDD=10 V 3
Output voltage high level VOH 14.95 15 V VIN=0.15 V, VDD=15 V 3
Input low voltage VIL 1.5 V VO=0.5 V, VIN=4.5 V, VDD=5 V 3
Input low voltage VIL 3 V VO=1.9 V, VDD=10 V (VIN not legible in extraction) 3
Input low voltage VIL 4 V VO=1.5 V, VIN=13.5 V, VDD=15 V 3
Input high voltage VIH 3.5 V VO=0.5 V, VIN=4.5 V, VDD=5 V 3
Input high voltage VIH 7 V VO=1.9 V, VDD=10 V (VIN not legible in extraction) 3
Input high voltage VIH 11 V VO=1.5 V, VIN=13.5 V, VDD=15 V 3
Input current VIN -1 1 µA VDD=18 V, -40 to +85°C (±0.1 µA at 25°C) 3

CAD (KiCad official)

  • Symbol: CD4078BE
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)
  • 3D model files: cd4078be-etched.step / cd4078be-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4078be.step / cd4078be.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (9 pp, sha256 c4499e75cae1e66b, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF