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Initial commit: component/cd4073bpwr

Ray ·77b6b45ac3 ·6d ago
2 files changed +228
README.mdadded+50
@@ -0,0 +1,50 @@+# CD4073BPWR++**Texas Instruments** · Logic Gates · TSSOP-14++CD4073BPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Input A of AND gate 1 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA. |+| 2 | 1B | input | Input B of AND gate 1 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA. |+| 3 | 2B | input | Input B of AND gate 2 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA. |+| 4 | 2A | input | Input A of AND gate 2 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA. |+| 5 | 2C | input | Input C of AND gate 2 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA. |+| 6 | 2Y | output | Output of AND gate 2 (Y = A•B•C), CMOS push-pull output providing the sink/source drive currents (IOL/IOH) listed in the static electrical characteristics table. |+| 7 | VSS | power_in | Negative supply / ground reference pin; all device voltages, including VDD (-0.5V to +20V) and input levels, are referenced to this terminal. |+| 8 | 1C | input | Input C of AND gate 1 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA. |+| 9 | 1Y | output | Output of AND gate 1 (Y = A•B•C), CMOS push-pull output providing the sink/source drive currents (IOL/IOH) listed in the static electrical characteristics table. |+| 10 | 3Y | output | Output of AND gate 3 (Y = A•B•C), CMOS push-pull output providing the sink/source drive currents (IOL/IOH) listed in the static electrical characteristics table. |+| 11 | 3C | input | Input C of AND gate 3 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA. |+| 12 | 3A | input | Input A of AND gate 3 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA. |+| 13 | 3B | input | Input B of AND gate 3 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA. |+| 14 | VDD | power_in | Positive supply pin; DC supply-voltage range -0.5V to +20V referenced to VSS, recommended operating supply-voltage range 3V to 18V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-14 |+| Category | Logic |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `CD4073BPWR`+- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`+- 3D model: TSSOP-14 (KiCad packages3D, STEP)+- 3D model files: `cd4073bpwr-etched.step` / `cd4073bpwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4073bpwr.step` / `cd4073bpwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd4073b.pdf) (34 pp, sha256 `68c6167d1ae45286`, retrieved 2026-09-29, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4073bpwr-datasheet.pdf)
page.jsonadded+178
@@ -0,0 +1,178 @@+{+  "slug": "cd4073bpwr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Logic Gates, TSSOP-14. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "cd4073bpwr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cd4073bpwr.kicad_sym",+    "cd4073bpwr.kicad_mod",+    "cd4073bpwr.glb",+    "cd4073bpwr.step",+    "cd4073bpwr.lbr",+    "docs/hero.png",+    "docs/cd4073bpwr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "CD4073BPWR",+    "manufacturer": "Texas Instruments",+    "package": "TSSOP-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Logic Gates",+    "datasheet": "https://www.ti.com/lit/ds/symlink/cd4073b.pdf",+    "parts": {+      "symbol": "cd4073bpwr.kicad_sym",+      "footprint": "cd4073bpwr.kicad_mod",+      "model_3d": "cd4073bpwr-etched.glb",+      "model_3d_plain": "cd4073bpwr.glb",+      "model_3d_step": "cd4073bpwr-etched.step",+      "model_3d_step_plain": "cd4073bpwr.step",+      "lbr": "cd4073bpwr.lbr"+    },+    "distributor_links": {+      "lcsc": "C2681997",+      "digikey": "296-14134-2-ND",+      "mouser": "595-CD4073BPWR"+    },+    "distributor_check": {+      "checked_at": "2026-09-29T16:22:10Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-14134-2-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-CD4073BPWR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "1A",+        "type": "input",+        "description": "Input A of AND gate 1 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA."+      },+      {+        "number": "2",+        "name": "1B",+        "type": "input",+        "description": "Input B of AND gate 1 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA."+      },+      {+        "number": "3",+        "name": "2B",+        "type": "input",+        "description": "Input B of AND gate 2 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA."+      },+      {+        "number": "4",+        "name": "2A",+        "type": "input",+        "description": "Input A of AND gate 2 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA."+      },+      {+        "number": "5",+        "name": "2C",+        "type": "input",+        "description": "Input C of AND gate 2 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA."+      },+      {+        "number": "6",+        "name": "2Y",+        "type": "output",+        "description": "Output of AND gate 2 (Y = A•B•C), CMOS push-pull output providing the sink/source drive currents (IOL/IOH) listed in the static electrical characteristics table."+      },+      {+        "number": "7",+        "name": "VSS",+        "type": "power_in",+        "description": "Negative supply / ground reference pin; all device voltages, including VDD (-0.5V to +20V) and input levels, are referenced to this terminal."+      },+      {+        "number": "8",+        "name": "1C",+        "type": "input",+        "description": "Input C of AND gate 1 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA."+      },+      {+        "number": "9",+        "name": "1Y",+        "type": "output",+        "description": "Output of AND gate 1 (Y = A•B•C), CMOS push-pull output providing the sink/source drive currents (IOL/IOH) listed in the static electrical characteristics table."+      },+      {+        "number": "10",+        "name": "3Y",+        "type": "output",+        "description": "Output of AND gate 3 (Y = A•B•C), CMOS push-pull output providing the sink/source drive currents (IOL/IOH) listed in the static electrical characteristics table."+      },+      {+        "number": "11",+        "name": "3C",+        "type": "input",+        "description": "Input C of AND gate 3 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA."+      },+      {+        "number": "12",+        "name": "3A",+        "type": "input",+        "description": "Input A of AND gate 3 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA."+      },+      {+        "number": "13",+        "name": "3B",+        "type": "input",+        "description": "Input B of AND gate 3 (one of three inputs of a 3-input AND gate); input voltage range -0.5V to VDD+0.5V, DC input current limit ±10mA."+      },+      {+        "number": "14",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply pin; DC supply-voltage range -0.5V to +20V referenced to VSS, recommended operating supply-voltage range 3V to 18V."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/cd4073b.pdf",+        "pages": 34,+        "sha256": "68c6167d1ae45286",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file