main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 5d ago
viewers cd4073bmt: viewers · Ray 5d ago
cd4073bmt-etched.glb Publish 0.1.0 · Ray 5d ago
cd4073bmt-etched.step cd4073bmt: factory component page (healed after the 2026-10-18 wiki outage) · Ray 5d ago
cd4073bmt-hero.glb cd4073bmt: hero GLB from the etched model (keeps the MPN mark) · Ray 5d ago
cd4073bmt-hero.overlay.json Publish 0.1.0 · Ray 5d ago
cd4073bmt.glb Publish 0.1.0 · Ray 5d ago
cd4073bmt.kicad_mod Publish 0.1.0 · Ray 5d ago
cd4073bmt.kicad_sym Publish 0.1.0 · Ray 5d ago
cd4073bmt.lbr Publish 0.1.0 · Ray 5d ago
cd4073bmt.step Publish 0.1.0 · Ray 5d ago
package.json Publish 0.1.0 · Ray 5d ago
page.json Set visibility: public · Ray 5d ago
README.md Publish 0.1.0 · Ray 5d ago

CD4073BMT

HGSEMI · Logic Gates · TSSOP-14

CD4073BMT from HGSEMI, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Gate 1 AND input A (CMOS-protected input, 5 V to 15 V supply range).
2 B input Gate 1 AND input B (CMOS-protected input, 5 V to 15 V supply range).
3 D input Gate 2 AND input D (CMOS-protected input, 5 V to 15 V supply range).
4 E input Gate 2 AND input E (CMOS-protected input, 5 V to 15 V supply range).
5 F input Gate 2 AND input F (CMOS-protected input, 5 V to 15 V supply range).
6 K output Gate 3 AND output K, buffered output with 0.05 V max VOL at the specified conditions.
7 VSS power_in Ground / negative supply terminal; all voltages are referenced to VSS.
8 C input Gate 1 AND input C (CMOS-protected input, 5 V to 15 V supply range).
9 J output Gate 1 AND output J, buffered output with 0.05 V max VOL at the specified conditions.
10 L output Gate 2 AND output L, buffered output with 0.05 V max VOL at the specified conditions.
11 I input Gate 3 AND input I (CMOS-protected input, 5 V to 15 V supply range).
12 H input Gate 3 AND input H (CMOS-protected input, 5 V to 15 V supply range).
13 G input Gate 3 AND input G (CMOS-protected input, 5 V to 15 V supply range).
14 VDD power_in Positive supply; recommended 5 V to 15 V, absolute maximum +20 V referenced to VSS.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package TSSOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply-Voltage Range (for full package temperature range) 5 15 V Full package temperature range 4
DC supply-voltage range (VDD), voltages referenced to VSS VDD -0.5 20 V Voltages referenced to VSS terminal 4
Input voltage range, all inputs -0.5 0.5 V 4
DC input current, any one input 10 mA Any one input 4
Power dissipation per package (PD) PD 500 mA For TA=55℃ to +100℃ (as printed) 4
Power dissipation per package (PD), derated range PD 200 mW For TA=+100℃ to +125℃; derate linearly at 12 (as printed) 4
Device dissipation per output transistor 100 mW For TA = full package temperature range (all package types) 4
Operating-temperature range (TA) TA -40 85 ℃ 4
Storage temperature range stag -65 150 ℃ 4
Lead temperature 245 ℃ At distance 1/16±1/32 inch (1.59±0.79 mm) from case for 10 s max 4
Propagation delay time TPHL,TPLH TPHL,TPLH 125 250 NS VDD=5 V; TA=25ºC, input tr,tf=20 ns, CL=50 pF, RL=200 KΩ 5
Propagation delay time TPHL,TPLH TPHL,TPLH 60 120 NS VDD=10 V; TA=25ºC, input tr,tf=20 ns, CL=50 pF, RL=200 KΩ 5
Propagation delay time TPHL,TPLH TPHL,TPLH 40 90 NS VDD=15 V; TA=25ºC, input tr,tf=20 ns, CL=50 pF, RL=200 KΩ 5
Transition time TPHL,TPLH TPHL,TPLH 100 200 NS VDD=5 V; TA=25ºC, input tr,tf=20 ns, CL=50 pF, RL=200 KΩ 5
Transition time TPHL,TPLH TPHL,TPLH 50 100 NS VDD=10 V; TA=25ºC, input tr,tf=20 ns, CL=50 pF, RL=200 KΩ 5
Transition time TPHL,TPLH TPHL,TPLH 40 80 NS VDD=15 V; TA=25ºC, input tr,tf=20 ns, CL=50 pF, RL=200 KΩ 5
Input Capacitance CIN 5 7.5 Pf Any input; TA=25ºC, CL=50 pF, RL=200 KΩ (as printed header) 5
Quiescent Device Current, +25 ºC IDD 0.01 0.25 µA VDD=5 V; VIN=0.5 (as printed); VO '-'; +25ºC 5
Quiescent Device Current, -40 ºC IDD 0.25 µA VDD=5 V; VIN=0.5 (as printed); -40ºC 5
Quiescent Device Current, +85 ºC IDD 7.5 µA VDD=5 V; VIN=0.5 (as printed); +85ºC 5
Quiescent Device Current, +25 ºC IDD 0.01 0.5 µA VDD=10 V; VIN=0.10 (as printed); +25ºC 5
Quiescent Device Current, -40 ºC IDD 0.5 µA VDD=10 V; VIN=0.10 (as printed); -40ºC 5
Quiescent Device Current, +85 ºC IDD 15 µA VDD=10 V; VIN=0.10 (as printed); +85ºC 5
Quiescent Device Current, +25 ºC IDD 0.01 1 µA VDD=15 V; VIN=0.15 (as printed); +25ºC 5
Quiescent Device Current, -40 ºC IDD 1 µA VDD=15 V; VIN=0.15 (as printed); -40ºC 5
Quiescent Device Current, +85 ºC IDD 30 µA VDD=15 V; VIN=0.15 (as printed); +85ºC 5
Quiescent Device Current, +25 ºC IDD 0.02 5 µA VDD=20 V; VIN=0.20 (as printed); +25ºC 5
Quiescent Device Current, -40 ºC IDD 5 µA VDD=20 V; VIN=0.20 (as printed); -40ºC 5
Quiescent Device Current, +85 ºC IDD 150 µA VDD=20 V; VIN=0.20 (as printed); +85ºC 5
Output Low (Sink) Current, +25 ºC IOL 0.51 1 mA VO=0.4 V; VIN=0.5 (as printed); VDD=5 V 5
Output Low (Sink) Current, -40 ºC IOL 0.61 mA VO=0.4 V; VIN=0.5 (as printed); VDD=5 V 5
Output Low (Sink) Current, +85 ºC IOL 0.42 mA VO=0.4 V; VIN=0.5 (as printed); VDD=5 V 5
Output Low (Sink) Current, +25 ºC IOL 1.3 2.6 mA VO=0.5 V; VIN=0.10 (as printed); VDD=10 V 5
Output Low (Sink) Current, -40 ºC IOL 1.5 mA VO=0.5 V; VIN=0.10 (as printed); VDD=10 V 5
Output Low (Sink) Current, +85 ºC IOL 1.1 mA VO=0.5 V; VIN=0.10 (as printed); VDD=10 V 5
Output Low (Sink) Current, +25 ºC IOL 3.4 6.8 mA VO=1.5 V; VIN=0.15 (as printed); VDD=15 V 5
Output Low (Sink) Current, -40 ºC IOL 4 mA VO=1.5 V; VIN=0.15 (as printed); VDD=15 V 5
Output Low (Sink) Current, +85 ºC IOL 2.8 mA VO=1.5 V; VIN=0.15 (as printed); VDD=15 V 5
Output High (Source) Current, +25 ºC IOH -0.51 -1 mA VO=4.6 V; VIN=0.5 (as printed); VDD=5 V 5
Output High (Source) Current, -40 ºC IOH -0.61 mA VO=4.6 V; VIN=0.5 (as printed); VDD=5 V 5
Output High (Source) Current, +85 ºC IOH -0.42 mA VO=4.6 V; VIN=0.5 (as printed); VDD=5 V 5
Output High (Source) Current, +25 ºC IOH -1.3 -2.6 mA VO=9.5 V; VIN=0.10 (as printed); VDD=10 V 5
Output High (Source) Current, -40 ºC IOH -1.5 mA VO=9.5 V; VIN=0.10 (as printed); VDD=10 V 5
Output High (Source) Current, +85 ºC IOH -1.1 mA VO=9.5 V; VIN=0.10 (as printed); VDD=10 V 5
Output High (Source) Current, +25 ºC IOH -3.4 -6.8 mA VO=13.5 V; VIN=0.15 (as printed); VDD=10 V (as printed) 5
Output High (Source) Current, -40 ºC IOH -4 mA VO=13.5 V; VIN=0.15 (as printed); VDD=10 V (as printed) 5
Output High (Source) Current, +85 ºC IOH -2.8 mA VO=13.5 V; VIN=0.15 (as printed); VDD=10 V (as printed) 5
Output Voltage Low-Level VOL 0.05 V VIN=0.5 (as printed); VDD=5 V; VO column '-' 5
Output Voltage High-Level VOH 4.95 5 V VIN=0.5 (as printed); VDD=5 V 5
Output Voltage High-Level VOH 9.95 10 V VIN=0.10 (as printed); VDD=10 V 5
Output Voltage High-Level VOH 14.95 15 V VIN=0.15 (as printed); VDD=15 V 5
Input Low Voltage VIL 1.5 V VO=0.5 V; VDD=5 V 5
Input Low Voltage VIL 3 V VO=1 V; VDD=10 V 5
Input Low Voltage VIL 4 V VO=1.5 V; VDD=15 V 5
Input High Voltage VIH 3.5 V VO=4.5 V; VDD=5 V 5
Input High Voltage VIH 7 V VO=9.5 V; VDD=10 V 5
Input High Voltage VIH 11 V VO=13.5 V; VDD=15 V 5
Input Current, +25 ºC -0.1 0.1 µA VIN=0.18 (as printed); VDD=18 V; +25ºC 5
Input Current, -40 ºC to +85 ºC -1 1 µA VIN=0.18 (as printed); VDD=18 V; full package temperature range 5

CAD (KiCad official)

  • Symbol: CD4073BMT
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: cd4073bmt-etched.step / cd4073bmt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4073bmt.step / cd4073bmt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (11 pp, sha256 327c31525062f4d9, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF