# CD4072BE

**Texas Instruments** · Logic Gates · DIP-14

CD4072BE from Texas Instruments, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | J | output | Output J of the first 4-input OR gate (inputs A, B, C, D). |
| 2 | A | input | Input A of the first 4-input OR gate. |
| 3 | B | input | Input B of the first 4-input OR gate. |
| 4 | C | input | Input C of the first 4-input OR gate. |
| 5 | D | input | Input D of the first 4-input OR gate. |
| 6 | NC | unconnected | Not shown on the functional diagram, so it is treated as no connection. |
| 7 | VSS | power_in | Ground/negative supply reference; VDD is specified relative to VSS. |
| 8 | NC | unconnected | Not shown on the functional diagram, so it is treated as no connection. |
| 9 | E | input | Input E of the second 4-input OR gate. |
| 10 | F | input | Input F of the second 4-input OR gate. |
| 11 | G | input | Input G of the second 4-input OR gate. |
| 12 | H | input | Input H of the second 4-input OR gate. |
| 13 | K | output | Output K of the second 4-input OR gate (inputs E, F, G, H). |
| 14 | VDD | power_in | Positive supply, recommended 3 V to 18 V, absolute maximum -0.5 V to +20 V relative to VSS. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | DIP-14 |
| Category | Logic |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `CD4072BE`
- Footprint: `Package_DIP:DIP-14_W7.62mm`
- 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files: `cd4072be-etched.step` / `cd4072be-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4072be.step` / `cd4072be.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd4072b) (34 pp, sha256 `e6108f3d67797b70`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cd4072be-datasheet.pdf)