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CD4072BDTR

XBLW · Logic Gates · SOP-14

CD4072BDTR from XBLW, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1Y output Data output of gate 1 (4-input OR).
2 1A input Data input A of gate 1; unused inputs must be tied to VDD, VSS or another input.
3 1B input Data input B of gate 1; unused inputs must be tied to VDD, VSS or another input.
4 1C input Data input C of gate 1; unused inputs must be tied to VDD, VSS or another input.
5 1D input Data input D of gate 1; unused inputs must be tied to VDD, VSS or another input.
6 n.c. unconnected Not connected.
7 VSS power_in Ground (0V), the reference for the supply and all voltages.
8 n.c. unconnected Not connected.
9 2A input Data input A of gate 2; unused inputs must be tied to VDD, VSS or another input.
10 2B input Data input B of gate 2; unused inputs must be tied to VDD, VSS or another input.
11 2C input Data input C of gate 2; unused inputs must be tied to VDD, VSS or another input.
12 2D input Data input D of gate 2; unused inputs must be tied to VDD, VSS or another input.
13 2Y output Data output of gate 2 (4-input OR).
14 VDD power_in Supply voltage, recommended 3V to 15V referenced to VSS, absolute maximum +18V.

Key specifications

Parameter Value
Manufacturer XBLW
Package SOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD4072BDTR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: cd4072bdtr-etched.step / cd4072bdtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4072bdtr.step / cd4072bdtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XBLW datasheet (12 pp, sha256 05b8bbbcac8c1edb, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF