main
Ray cd4070cmt: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) bf85160
{
  "schema_version": 1,
  "type": "component",
  "slug": "cd4070cmt",
  "title": "CD4070CMT",
  "brief": "HGSEMI Gates, TSSOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "cd4070cmt"
  ],
  "component": {
    "mpn": "CD4070CMT",
    "manufacturer": "HGSEMI",
    "package": "TSSOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Gates",
    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2402021505_HGSEMI-CD4070CMT-TR_C20613257.pdf",
    "parts": {
      "symbol": "cd4070cmt.kicad_sym",
      "footprint": "cd4070cmt.kicad_mod",
      "model_3d": "cd4070cmt-etched.glb",
      "model_3d_plain": "cd4070cmt.glb",
      "model_3d_step": "cd4070cmt-etched.step",
      "model_3d_step_plain": "cd4070cmt.step",
      "lbr": "cd4070cmt.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "A",
        "type": "input",
        "description": "Input A of XOR gate 1 (J = A XOR B). CMOS logic input, VIH >= 0.7*VDD, VIL <= 0.3*VDD, IIN <= 1 uA @ VDD = 15 V."
      },
      {
        "number": "2",
        "name": "B",
        "type": "input",
        "description": "Input B of XOR gate 1 (J = A XOR B). CMOS logic input."
      },
      {
        "number": "3",
        "name": "J",
        "type": "output",
        "description": "Output J of XOR gate 1 (J = A XOR B). CMOS push-pull output; IOH ~= -14 mA and IOL ~= 28 mA typical at VDD = 15 V."
      },
      {
        "number": "4",
        "name": "K",
        "type": "output",
        "description": "Output K of XOR gate 2 (K = C XOR D). CMOS push-pull output."
      },
      {
        "number": "5",
        "name": "C",
        "type": "input",
        "description": "Input C of XOR gate 2 (K = C XOR D). CMOS logic input."
      },
      {
        "number": "6",
        "name": "D",
        "type": "input",
        "description": "Input D of XOR gate 2 (K = C XOR D). CMOS logic input."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply / ground reference (0 V). All logic levels referenced to VSS."
      },
      {
        "number": "8",
        "name": "E",
        "type": "input",
        "description": "Input E of XOR gate 3 (L = E XOR F). CMOS logic input."
      },
      {
        "number": "9",
        "name": "F",
        "type": "input",
        "description": "Input F of XOR gate 3 (L = E XOR F). CMOS logic input."
      },
      {
        "number": "10",
        "name": "L",
        "type": "output",
        "description": "Output L of XOR gate 3 (L = E XOR F). CMOS push-pull output."
      },
      {
        "number": "11",
        "name": "M",
        "type": "output",
        "description": "Output M of XOR gate 4 (M = G XOR H). CMOS push-pull output."
      },
      {
        "number": "12",
        "name": "G",
        "type": "input",
        "description": "Input G of XOR gate 4 (M = G XOR H). CMOS logic input."
      },
      {
        "number": "13",
        "name": "H",
        "type": "input",
        "description": "Input H of XOR gate 4 (M = G XOR H). CMOS logic input."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply, 3.0 V to 15.0 V (absolute max 18 V). Bypass with a local ceramic capacitor to VSS."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2402021505_HGSEMI-CD4070CMT-TR_C20613257.pdf",
        "pages": 9,
        "sha256": "1ce55545a5113aef",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "CD4070",
      "logic_family": "CD4000",
      "function_code": "4070",
      "function_class": "Gate",
      "function_name": "Quad 2-Input XOR Gate",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "cd4070cmt.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5,
          1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4070cmt-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5,
          1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "21245e5abbc6989c3dbc921df9e5bbf807cff61d33f1211b34899666bbdc3659",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "HGSEMI",
      "Package": "TSSOP-14",
      "Category": "Logic",
      "Pins": "14"
    }
  },
  "variants": [
    {
      "mpn": "CD4070CMT/TR",
      "kind": "packaging"
    },
    {
      "mpn": "CD4070CMTCM/TR",
      "kind": "packaging"
    },
    {
      "mpn": "CD4070CMTCN",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cd4070cmt"
  ],
  "discovery_pitch": "CD4070CMT (HGSEMI) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4070cmt.kicad_sym",
    "cd4070cmt.kicad_mod",
    "cd4070cmt.glb",
    "cd4070cmt.step",
    "cd4070cmt.lbr",
    "docs/hero.png",
    "docs/cd4070cmt-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T18:47:02.298Z"
}