component
CD4070BM96
Public Made by Adomby adom
Texas Instruments Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
cd4070bm96: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body…
045b43e
15d ago
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{
"schema_version": 1,
"type": "component",
"slug": "cd4070bm96",
"title": "CD4070BM96",
"brief": "Texas Instruments Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"logic",
"cd4070bm96"
],
"component": {
"mpn": "CD4070BM96",
"manufacturer": "Texas Instruments",
"package": "SOIC-14",
"pin_count": 14,
"category": "Logic",
"subcategory": "Gates",
"datasheet": "https://www.ti.com/lit/ds/symlink/cd4070bm96.pdf",
"parts": {
"symbol": "cd4070bm96.kicad_sym",
"footprint": "cd4070bm96.kicad_mod",
"model_3d": "cd4070bm96-etched.glb",
"model_3d_plain": "cd4070bm96.glb",
"model_3d_step": "cd4070bm96-etched.step",
"model_3d_step_plain": "cd4070bm96.step",
"lbr": "cd4070bm96.lbr"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "A",
"type": "input",
"description": "Input A of gate 1 (J = A XOR B). CMOS input protected by the on-chip CMOS protection network. VIH >= 3.5V @ VDD=5V; VIL <= 1.5V @ VDD=5V; IIN typ 1e-5 uA, max 0.1 uA at 18V/25C."
},
{
"number": "2",
"name": "B",
"type": "input",
"description": "Input B of gate 1 (J = A XOR B). CMOS input protected by the on-chip CMOS protection network."
},
{
"number": "3",
"name": "J",
"type": "output",
"description": "Output of gate 1 (J = A XOR B). CMOS push-pull output, symmetric drive. VOH >= 4.95V and VOL <= 0.05V at VDD=5V. IOL/IOH ~ 0.51 mA min @ VDD=5V."
},
{
"number": "4",
"name": "K",
"type": "output",
"description": "Output of gate 2 (K = C XOR D). CMOS push-pull output, symmetric drive characteristics."
},
{
"number": "5",
"name": "C",
"type": "input",
"description": "Input C of gate 2 (K = C XOR D). CMOS input protected by the on-chip CMOS protection network."
},
{
"number": "6",
"name": "D",
"type": "input",
"description": "Input D of gate 2 (K = C XOR D). CMOS input protected by the on-chip CMOS protection network."
},
{
"number": "7",
"name": "VSS",
"type": "power_in",
"description": "Negative supply / ground reference. Typically tied to 0V. Supply voltage range VDD-VSS = 3V to 18V (absolute max 20V)."
},
{
"number": "8",
"name": "E",
"type": "input",
"description": "Input E of gate 3 (L = E XOR F). CMOS input protected by the on-chip CMOS protection network."
},
{
"number": "9",
"name": "F",
"type": "input",
"description": "Input F of gate 3 (L = E XOR F). CMOS input protected by the on-chip CMOS protection network."
},
{
"number": "10",
"name": "L",
"type": "output",
"description": "Output of gate 3 (L = E XOR F). CMOS push-pull output, symmetric drive characteristics."
},
{
"number": "11",
"name": "M",
"type": "output",
"description": "Output of gate 4 (M = G XOR H). CMOS push-pull output, symmetric drive characteristics."
},
{
"number": "12",
"name": "G",
"type": "input",
"description": "Input G of gate 4 (M = G XOR H). CMOS input protected by the on-chip CMOS protection network."
},
{
"number": "13",
"name": "H",
"type": "input",
"description": "Input H of gate 4 (M = G XOR H). CMOS input protected by the on-chip CMOS protection network."
},
{
"number": "14",
"name": "VDD",
"type": "power_in",
"description": "Positive supply voltage. Operating range 3V to 18V; absolute maximum 20V (referenced to VSS). Quiescent IDD typ 0.01 uA at VDD=5-15V; 0.02 uA typ at VDD=20V."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/cd4070bm96.pdf",
"pages": 30,
"sha256": "844d150c497df9f2",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 14,
"described": 14,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"logic": {
"family_id": "CD4070",
"logic_family": "CD4000",
"function_code": "4070",
"function_class": "Gate",
"function_name": "Quad 2-Input XOR Gate",
"manufacturer": "Texas Instruments",
"is_specialty": false
},
"models_3d": [
{
"file": "cd4070bm96.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
8.7,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cd4070bm96-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
8.7,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "d89f71a7f1d8763ef77cbab821918a2aae2bd8371b3f12bd5c4580b7dc5dcd82",
"checked": "2026-10-19",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "SOIC-14",
"Category": "Logic",
"Pins": "14"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"cd4070bm96"
],
"discovery_pitch": "CD4070BM96 (Texas Instruments) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"cd4070bm96.kicad_sym",
"cd4070bm96.kicad_mod",
"cd4070bm96.glb",
"cd4070bm96.step",
"cd4070bm96-etched.step",
"cd4070bm96.lbr",
"docs/hero.png",
"docs/cd4070bm96-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "CD4070BM96",
"kind": "packaging"
},
{
"mpn": "CD4070BM96E4",
"kind": "packaging"
},
{
"mpn": "CD4070BM96G4",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BME4",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BMG4",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BMT",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BMTE4",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BMTG4",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BE",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BEE4",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BF",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BF3A",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BF3AS2534",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BNSR",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BNSRE4",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BNSRG4",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BPW",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BPWE4",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BPWG4",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BPWR",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BPWRE4",
"kind": "packaging"
},
{
"mpn": "CD4070BM96BPWRG4",
"kind": "packaging"
}
],
"updated_at": "2026-09-24T18:46:54.141Z"
}