cd4070bm96: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body…
cd4070bm96: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
cd4070bm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero
cd4070bm96: laser-etched CAD + chip hero (factory 2.0.0 backfill)
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
cd4070bm96: hero re-rendered with iso-front (part number upright)
cd4070bm96: laser-etched CAD + chip hero (factory 2.0.0 backfill)
cd4070bm96: stamp component.logic (CD4070) from component-ocean
cd4070bm96: backfill missing artifacts (variants)
cd4070bm96: publish the laser-etched STEP alongside the bare one
cd4070bm96: factory component page (tier=mfr)
Initial commit: component/cd4070bm96