← Commit history

cd4070bm96: factory component page (tier=mfr)

Ray ·f995cb4f28 ·2mo ago ·parent 52214d4
1 file changed +152−8
page.json+152−8
@@ -1,13 +1,162 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "cd4070bm96",+  "title": "CD4070BM96",+  "brief": "Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "cd4070bm96"   ],+  "component": {+    "mpn": "CD4070BM96",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Gates",+    "datasheet": "https://www.ti.com/lit/ds/symlink/cd4070bm96.pdf",+    "parts": {+      "symbol": "cd4070bm96.kicad_sym",+      "footprint": "cd4070bm96.kicad_mod",+      "model_3d": "cd4070bm96.glb",+      "model_3d_step": "cd4070bm96.step",+      "lbr": "cd4070bm96.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "A",+        "type": "input",+        "description": "Input A of gate 1 (J = A XOR B). CMOS input protected by the on-chip CMOS protection network. VIH >= 3.5V @ VDD=5V; VIL <= 1.5V @ VDD=5V; IIN typ 1e-5 uA, max 0.1 uA at 18V/25C."+      },+      {+        "number": "2",+        "name": "B",+        "type": "input",+        "description": "Input B of gate 1 (J = A XOR B). CMOS input protected by the on-chip CMOS protection network."+      },+      {+        "number": "3",+        "name": "J",+        "type": "output",+        "description": "Output of gate 1 (J = A XOR B). CMOS push-pull output, symmetric drive. VOH >= 4.95V and VOL <= 0.05V at VDD=5V. IOL/IOH ~ 0.51 mA min @ VDD=5V."+      },+      {+        "number": "4",+        "name": "K",+        "type": "output",+        "description": "Output of gate 2 (K = C XOR D). CMOS push-pull output, symmetric drive characteristics."+      },+      {+        "number": "5",+        "name": "C",+        "type": "input",+        "description": "Input C of gate 2 (K = C XOR D). CMOS input protected by the on-chip CMOS protection network."+      },+      {+        "number": "6",+        "name": "D",+        "type": "input",+        "description": "Input D of gate 2 (K = C XOR D). CMOS input protected by the on-chip CMOS protection network."+      },+      {+        "number": "7",+        "name": "VSS",+        "type": "power_in",+        "description": "Negative supply / ground reference. Typically tied to 0V. Supply voltage range VDD-VSS = 3V to 18V (absolute max 20V)."+      },+      {+        "number": "8",+        "name": "E",+        "type": "input",+        "description": "Input E of gate 3 (L = E XOR F). CMOS input protected by the on-chip CMOS protection network."+      },+      {+        "number": "9",+        "name": "F",+        "type": "input",+        "description": "Input F of gate 3 (L = E XOR F). CMOS input protected by the on-chip CMOS protection network."+      },+      {+        "number": "10",+        "name": "L",+        "type": "output",+        "description": "Output of gate 3 (L = E XOR F). CMOS push-pull output, symmetric drive characteristics."+      },+      {+        "number": "11",+        "name": "M",+        "type": "output",+        "description": "Output of gate 4 (M = G XOR H). CMOS push-pull output, symmetric drive characteristics."+      },+      {+        "number": "12",+        "name": "G",+        "type": "input",+        "description": "Input G of gate 4 (M = G XOR H). CMOS input protected by the on-chip CMOS protection network."+      },+      {+        "number": "13",+        "name": "H",+        "type": "input",+        "description": "Input H of gate 4 (M = G XOR H). CMOS input protected by the on-chip CMOS protection network."+      },+      {+        "number": "14",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply voltage. Operating range 3V to 18V; absolute maximum 20V (referenced to VSS). Quiescent IDD typ 0.01 uA at VDD=5-15V; 0.02 uA typ at VDD=20V."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/cd4070bm96.pdf",+        "pages": 30,+        "sha256": "844d150c497df9f2",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Texas Instruments",+      "Package": "SOIC-14",+      "Category": "Logic",+      "Pins": "14"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "cd4070bm96"+  ],+  "discovery_pitch": "CD4070BM96 (Texas Instruments) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +174,5 @@     "docs/cd4070bm96-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file