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CD4069UBPWRG
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HANSCHIP semiconductor Inverters, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CD4069UBPWRG
HANSCHIP semiconductor · Inverters · TSSOP-14
CD4069UBPWRG from HANSCHIP semiconductor, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Input of inverter 1; input voltage must stay between VSS and VDD (absolute limits -0.5 V to VDD+0.5 V). |
| 2 | Y1 | output | Output of inverter 1; at VDD = 15 V the datasheet gives VOL up to 0.05 V and VOH down to 14.95 V with |
| 3 | A2 | input | Input of inverter 2; input voltage must stay between VSS and VDD (absolute limits -0.5 V to VDD+0.5 V). |
| 4 | Y2 | output | Output of inverter 2; at VDD = 15 V the datasheet gives VOL up to 0.05 V and VOH down to 14.95 V with |
| 5 | A3 | input | Input of inverter 3; input voltage must stay between VSS and VDD (absolute limits -0.5 V to VDD+0.5 V). |
| 6 | Y3 | output | Output of inverter 3; at VDD = 15 V the datasheet gives VOL up to 0.05 V and VOH down to 14.95 V with |
| 7 | VSS | power_in | Ground reference (0 V) for the device; all input and output voltages are referenced to VSS. |
| 8 | Y4 | output | Output of inverter 4; at VDD = 15 V the datasheet gives VOL up to 0.05 V and VOH down to 14.95 V with |
| 9 | A4 | input | Input of inverter 4; input voltage must stay between VSS and VDD (absolute limits -0.5 V to VDD+0.5 V). |
| 10 | Y5 | output | Output of inverter 5; at VDD = 15 V the datasheet gives VOL up to 0.05 V and VOH down to 14.95 V with |
| 11 | A5 | input | Input of inverter 5; input voltage must stay between VSS and VDD (absolute limits -0.5 V to VDD+0.5 V). |
| 12 | Y6 | output | Output of inverter 6; at VDD = 15 V the datasheet gives VOL up to 0.05 V and VOH down to 14.95 V with |
| 13 | A6 | input | Input of inverter 6; input voltage must stay between VSS and VDD (absolute limits -0.5 V to VDD+0.5 V). |
| 14 | VDD | power_in | Positive supply; recommended operating range 3.0 V to 15.0 V, absolute maximum -0.5 V to 18 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VDD | -0.5 | 18 | V | 3 | ||
| Power dissipation | PD | 500 | mW | 3 | |||
| Operating temperature (absolute maximum) | TA | -40 | 85 | ℃ | 3 | ||
| Storage temperature | TS | -65 | 150 | ℃ | 3 | ||
| Lead soldering temperature | TW | 245 | ℃ | 10s | 3 | ||
| Supply voltage (recommended operating) | VDD | 3 | 15 | V | 3 | ||
| Input/output voltage (recommended operating) | VIN、Vout | 0 | V | 3 | |||
| Operating temperature (recommended) | TA | -40 | 85 | ℃ | 3 | ||
| High-level input voltage | VIH | 4 | V | /IO/ ≤1uA, Vo=0.5V, VDD=5V | 3 | ||
| High-level input voltage | VIH | 8 | V | /IO/ ≤1uA, Vo=1V, VDD=10V | 3 | ||
| High-level input voltage | VIH | 12 | V | /IO/ ≤1uA, Vo=1.5V, VDD=15V | 3 | ||
| Low-level input voltage | VIL | 1 | V | /IO/ ≤1uA, Vo=4.5V, VDD=5V | 3 | ||
| Low-level input voltage | VIL | 2 | V | /IO/ ≤1uA, Vo=9V, VDD=10V | 3 | ||
| Low-level input voltage | VIL | 3 | V | /IO/ ≤1uA, Vo=13.5V, VDD=15V | 3 | ||
| High-level output voltage | VOH | 4.95 | V | /IOUT/ <1uA, VDD=5V | 3 | ||
| High-level output voltage | VOH | 9.95 | V | /IOUT/ <1uA, VDD=10V | 3 | ||
| High-level output voltage | VOH | 14.95 | V | /IOUT/ <1uA, VDD=15V | 3 | ||
| Low-level output voltage | VOL | 0 | 0.05 | V | /IOUT/ <1uA, VDD=5V | 3 | |
| Input current | IIN | 0 | 1 | uA | VIN=VDD or VSS, VDD=15V | 3 | |
| High-level output current | IOH | -1.4 | -0.45 | mA | Vo=4.5V, VDD=5V | 3 | |
| High-level output current | IOH | -3 | -1.2 | mA | Vo=9V, VDD=10V | 3 | |
| High-level output current | IOH | -10 | -3 | mA | Vo=13.5V, VDD=15V | 3 | |
| Low-level output current | IOL | 0.45 | 3.3 | mA | Vo=0.4V, VDD=5V | 3 | |
| Low-level output current | IOL | 1 | 12 | mA | Vo=0.5V, VDD=10V | 3 | |
| Low-level output current | IOL | 3 | 24 | mA | Vo=1.5V, VDD=15V | 3 | |
| Operating (quiescent) current | IDD | 1 | uA | VIN=VDD or VSS, VDD=5V | 3 | ||
| Operating (quiescent) current | IDD | 2 | uA | VIN=VDD or VSS, VDD=10V | 3 | ||
| Operating (quiescent) current | IDD | 4 | uA | VIN=VDD or VSS, VDD=15V | 3 | ||
| Propagation delay time A to Y (high-to-low) | tPHL | 32 | ns | VDD=5V CL=51pF | 4 | ||
| Propagation delay time A to Y (low-to-high) | tPLH | 42 | ns | VDD=5V CL=51pF | 4 | ||
| Propagation delay time A to Y (high-to-low) | tPHL | 23 | ns | VDD=10V CL=51pF | 4 | ||
| Propagation delay time A to Y (low-to-high) | tPLH | 32 | ns | VDD=10V CL=51pF | 4 | ||
| Propagation delay time A to Y (high-to-low) | tPHL | 25 | ns | VDD=15V CL=51pF | 4 | ||
| Propagation delay time A to Y (low-to-high) | tPLH | 27 | ns | VDD=15V CL=51pF | 4 |
CAD (KiCad official)
- Symbol:
CD4069UBPWRG - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
cd4069ubpwrg-etched.step/cd4069ubpwrg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4069ubpwrg.step/cd4069ubpwrg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HANSCHIP semiconductor datasheet (8 pp, sha256
f5d4867e9f92a438, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD4069UBPWRG
**HANSCHIP semiconductor** · Inverters · TSSOP-14
CD4069UBPWRG from HANSCHIP semiconductor, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Input of inverter 1; input voltage must stay between VSS and VDD (absolute limits -0.5 V to VDD+0.5 V). |
| 2 | Y1 | output | Output of inverter 1; at VDD = 15 V the datasheet gives VOL up to 0.05 V and VOH down to 14.95 V with |IOUT| < 1 uA. |
| 3 | A2 | input | Input of inverter 2; input voltage must stay between VSS and VDD (absolute limits -0.5 V to VDD+0.5 V). |
| 4 | Y2 | output | Output of inverter 2; at VDD = 15 V the datasheet gives VOL up to 0.05 V and VOH down to 14.95 V with |IOUT| < 1 uA. |
| 5 | A3 | input | Input of inverter 3; input voltage must stay between VSS and VDD (absolute limits -0.5 V to VDD+0.5 V). |
| 6 | Y3 | output | Output of inverter 3; at VDD = 15 V the datasheet gives VOL up to 0.05 V and VOH down to 14.95 V with |IOUT| < 1 uA. |
| 7 | VSS | power_in | Ground reference (0 V) for the device; all input and output voltages are referenced to VSS. |
| 8 | Y4 | output | Output of inverter 4; at VDD = 15 V the datasheet gives VOL up to 0.05 V and VOH down to 14.95 V with |IOUT| < 1 uA. |
| 9 | A4 | input | Input of inverter 4; input voltage must stay between VSS and VDD (absolute limits -0.5 V to VDD+0.5 V). |
| 10 | Y5 | output | Output of inverter 5; at VDD = 15 V the datasheet gives VOL up to 0.05 V and VOH down to 14.95 V with |IOUT| < 1 uA. |
| 11 | A5 | input | Input of inverter 5; input voltage must stay between VSS and VDD (absolute limits -0.5 V to VDD+0.5 V). |
| 12 | Y6 | output | Output of inverter 6; at VDD = 15 V the datasheet gives VOL up to 0.05 V and VOH down to 14.95 V with |IOUT| < 1 uA. |
| 13 | A6 | input | Input of inverter 6; input voltage must stay between VSS and VDD (absolute limits -0.5 V to VDD+0.5 V). |
| 14 | VDD | power_in | Positive supply; recommended operating range 3.0 V to 15.0 V, absolute maximum -0.5 V to 18 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VDD | -0.5 | | 18 | V | | 3 |
| Power dissipation | PD | | | 500 | mW | | 3 |
| Operating temperature (absolute maximum) | TA | -40 | | 85 | ℃ | | 3 |
| Storage temperature | TS | -65 | | 150 | ℃ | | 3 |
| Lead soldering temperature | TW | | | 245 | ℃ | 10s | 3 |
| Supply voltage (recommended operating) | VDD | 3 | | 15 | V | | 3 |
| Input/output voltage (recommended operating) | VIN、Vout | 0 | | | V | | 3 |
| Operating temperature (recommended) | TA | -40 | | 85 | ℃ | | 3 |
| High-level input voltage | VIH | 4 | | | V | /IO/ ≤1uA, Vo=0.5V, VDD=5V | 3 |
| High-level input voltage | VIH | 8 | | | V | /IO/ ≤1uA, Vo=1V, VDD=10V | 3 |
| High-level input voltage | VIH | 12 | | | V | /IO/ ≤1uA, Vo=1.5V, VDD=15V | 3 |
| Low-level input voltage | VIL | | | 1 | V | /IO/ ≤1uA, Vo=4.5V, VDD=5V | 3 |
| Low-level input voltage | VIL | | | 2 | V | /IO/ ≤1uA, Vo=9V, VDD=10V | 3 |
| Low-level input voltage | VIL | | | 3 | V | /IO/ ≤1uA, Vo=13.5V, VDD=15V | 3 |
| High-level output voltage | VOH | 4.95 | | | V | /IOUT/ <1uA, VDD=5V | 3 |
| High-level output voltage | VOH | 9.95 | | | V | /IOUT/ <1uA, VDD=10V | 3 |
| High-level output voltage | VOH | 14.95 | | | V | /IOUT/ <1uA, VDD=15V | 3 |
| Low-level output voltage | VOL | 0 | | 0.05 | V | /IOUT/ <1uA, VDD=5V | 3 |
| Input current | IIN | 0 | | 1 | uA | VIN=VDD or VSS, VDD=15V | 3 |
| High-level output current | IOH | -1.4 | | -0.45 | mA | Vo=4.5V, VDD=5V | 3 |
| High-level output current | IOH | -3 | | -1.2 | mA | Vo=9V, VDD=10V | 3 |
| High-level output current | IOH | -10 | | -3 | mA | Vo=13.5V, VDD=15V | 3 |
| Low-level output current | IOL | 0.45 | | 3.3 | mA | Vo=0.4V, VDD=5V | 3 |
| Low-level output current | IOL | 1 | | 12 | mA | Vo=0.5V, VDD=10V | 3 |
| Low-level output current | IOL | 3 | | 24 | mA | Vo=1.5V, VDD=15V | 3 |
| Operating (quiescent) current | IDD | | | 1 | uA | VIN=VDD or VSS, VDD=5V | 3 |
| Operating (quiescent) current | IDD | | | 2 | uA | VIN=VDD or VSS, VDD=10V | 3 |
| Operating (quiescent) current | IDD | | | 4 | uA | VIN=VDD or VSS, VDD=15V | 3 |
| Propagation delay time A to Y (high-to-low) | tPHL | | | 32 | ns | VDD=5V CL=51pF | 4 |
| Propagation delay time A to Y (low-to-high) | tPLH | | | 42 | ns | VDD=5V CL=51pF | 4 |
| Propagation delay time A to Y (high-to-low) | tPHL | | | 23 | ns | VDD=10V CL=51pF | 4 |
| Propagation delay time A to Y (low-to-high) | tPLH | | | 32 | ns | VDD=10V CL=51pF | 4 |
| Propagation delay time A to Y (high-to-low) | tPHL | | | 25 | ns | VDD=15V CL=51pF | 4 |
| Propagation delay time A to Y (low-to-high) | tPLH | | | 27 | ns | VDD=15V CL=51pF | 4 |
## CAD (KiCad official)
- Symbol: `CD4069UBPWRG`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `cd4069ubpwrg-etched.step` / `cd4069ubpwrg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4069ubpwrg.step` / `cd4069ubpwrg.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HANSCHIP semiconductor datasheet](docs/cd4069ubpwrg-datasheet.pdf) (8 pp, sha256 `f5d4867e9f92a438`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd4069ubpwrg-datasheet.pdf)