component

CD4069UBNSR

Public Made by Adom

by adom

Texas Instruments Inverters, SOIC-14-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogiccd4069ubnsrfactory-2.0.0extractor-text

Verified CD4069UBNSR

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 14 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: CD4069UBNSR · SOIC-14-208mil · 14 pins
  • ✓copper: 14 copper pads, none touching another net
  • ✓datasheet: all 14 pin names found in the 34-page datasheet
  • ✓distributor: lcsc C2866535, digikey 296-14126-2-ND, mouser 595-CD4069UBNSR
  • ✓family: SOIC-14_3.9x8.7mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-q2thd8qu/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 14 pins = 14 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 14 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ cd4069ubnsr.kicad_sym✓ cd4069ubnsr.kicad_mod✓ cd4069ubnsr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3h ago
viewers cd4069ubnsr: viewers · Ray 3h ago
cd4069ubnsr-etched.glb Publish 0.1.0 · Ray 3h ago
cd4069ubnsr-etched.step cd4069ubnsr: factory component page (tier=mfr) · Ray 3h ago
cd4069ubnsr-hero.glb cd4069ubnsr: hero GLB from the etched model (keeps the MPN mark) · Ray 3h ago
cd4069ubnsr-hero.overlay.json Publish 0.1.0 · Ray 3h ago
cd4069ubnsr.glb Publish 0.1.0 · Ray 3h ago
cd4069ubnsr.kicad_mod Publish 0.1.0 · Ray 3h ago
cd4069ubnsr.kicad_sym Publish 0.1.0 · Ray 3h ago
cd4069ubnsr.lbr Publish 0.1.0 · Ray 3h ago
cd4069ubnsr.step Publish 0.1.0 · Ray 3h ago
package.json Publish 0.1.0 · Ray 3h ago
page.json Set visibility: public · Ray 3h ago
README.md Publish 0.1.0 · Ray 3h ago
verification.json Verified: Published by the parts factory: tier mfr, 14 pins · Ray 3h ago

CD4069UBNSR

Texas Instruments · Inverters · SOIC-14-208mil

CD4069UBNSR from Texas Instruments, in a SOIC-14-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Input A of inverter 1, which drives output G.
2 G output Output G, the inverted logic level of input A.
3 B input Input B of inverter 2, which drives output H.
4 H output Output H, the inverted logic level of input B.
5 C input Input C of inverter 3, which drives output I.
6 I output Output I, the inverted logic level of input C.
7 VSS power_in Negative supply, the reference for all voltages in the device (VSS terminal).
8 J output Output J, the inverted logic level of input D.
9 D input Input D of inverter 4, which drives output J.
10 K output Output K, the inverted logic level of input E.
11 E input Input E of inverter 5, which drives output K.
12 L output Output L, the inverted logic level of input F.
13 F input Input F of inverter 6, which drives output L.
14 VDD power_in Positive supply; the recommended supply voltage range is 3 V to 18 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14-208mil
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC supply voltage VDD -0.5 20 V voltages referenced to VSS terminal 4
Input voltage, all inputs VI -0.5 V max printed as VDD + 0.5 V 4
DC input current, any one input IIK -10 10 mA any one input 4
Power dissipation per package PD 500 mW -55°C to 100°C 4
Power dissipation per package PD 200 mW 100°C to 125°C 4
Device dissipation per output transistor 100 mW Full range (all package types) 4
Lead temperature 265 °C During soldering at 1/16 inch ± 1/32 inch from case for 10 s maximum 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Supply voltage VDD 3 18 V over operating free-air temperature range 4
Operating temperature TA -55 125 °C over operating free-air temperature range 4
Propagation delay time tPLH, tPHL 55 110 ns VDD = 5 V; TA = 25°C; tr, tf = 20 ns; CL = 50 pF; RL = 200 kΩ 5
Propagation delay time tPLH, tPHL 30 60 ns VDD = 10 V; TA = 25°C; tr, tf = 20 ns; CL = 50 pF; RL = 200 kΩ 5
Propagation delay time tPLH, tPHL 25 50 ns VDD = 15 V; TA = 25°C; tr, tf = 20 ns; CL = 50 pF; RL = 200 kΩ 5
Transition time tTHL, tTLH 100 200 ns VDD = 5 V; TA = 25°C; tr, tf = 20 ns; CL = 50 pF; RL = 200 kΩ 5
Transition time tTHL, tTLH 50 100 ns VDD = 10 V; TA = 25°C; tr, tf = 20 ns; CL = 50 pF; RL = 200 kΩ 5
Transition time tTHL, tTLH 40 80 ns VDD = 15 V; TA = 25°C; tr, tf = 20 ns; CL = 50 pF; RL = 200 kΩ 5
Input capacitance CIN 10 15 pF Any input; TA = 25°C; tr, tf = 20 ns; CL = 50 pF; RL = 200 kΩ 5
Quiescent device current IDD 0.25 µA VIN = 0 or 5 V, VDD = 5 V, TA = -55°C 5
Quiescent device current IDD 0.01 0.25 µA VIN = 0 or 5 V, VDD = 5 V, TA = 25°C 5
Quiescent device current IDD 7.5 µA VIN = 0 or 5 V, VDD = 5 V, TA = 85°C 5
Quiescent device current IDD 0.5 µA VIN = 0 or 10 V, VDD = 10 V, TA = -55°C 5
Quiescent device current IDD 0.01 0.5 µA VIN = 0 or 10 V, VDD = 10 V, TA = 25°C 5
Quiescent device current IDD 15 µA VIN = 0 or 10 V, VDD = 10 V, TA = 85°C 5
Quiescent device current IDD 1 µA VIN = 0 or 15 V, VDD = 15 V, TA = -55°C 5
Quiescent device current IDD 0.01 1 µA VIN = 0 or 15 V, VDD = 15 V, TA = 25°C 5
Quiescent device current IDD 30 µA VIN = 0 or 15 V, VDD = 15 V, TA = 85°C 5
Quiescent device current IDD 5 µA VIN = 0 or 20 V, VDD = 20 V, TA = -55°C 5
Quiescent device current IDD 0.02 5 µA VIN = 0 or 20 V, VDD = 20 V, TA = 25°C 5
Quiescent device current IDD 150 µA VIN = 0 or 20 V, VDD = 20 V, TA = 85°C 5
Output low (sink) current IOL 0.64 mA VO = 0.4 V, VIN = 5 V, VDD = 5 V, TA = -55°C 5
Output low (sink) current IOL 0.61 mA VO = 0.4 V, VIN = 5 V, VDD = 5 V, TA = -40°C 5
Output low (sink) current IOL 0.51 1 mA VO = 0.4 V, VIN = 5 V, VDD = 5 V, TA = 25°C 5
Output low (sink) current IOL 0.42 mA VO = 0.4 V, VIN = 5 V, VDD = 5 V, TA = 85°C 5
Output low (sink) current IOL 0.36 mA VO = 0.4 V, VIN = 5 V, VDD = 5 V, TA = 125°C 5
Output low (sink) current IOL 1.6 mA VO = 0.5 V, VIN = 10 V, VDD = 10 V, TA = -55°C 5
Output low (sink) current IOL 1.5 mA VO = 0.5 V, VIN = 10 V, VDD = 10 V, TA = -40°C 5
Output low (sink) current IOL 1.3 2.6 mA VO = 0.5 V, VIN = 10 V, VDD = 10 V, TA = 25°C 5
Output low (sink) current IOL 1.1 mA VO = 0.5 V, VIN = 10 V, VDD = 10 V, TA = 85°C 5
Output low (sink) current IOL 0.9 mA VO = 0.5 V, VIN = 10 V, VDD = 10 V, TA = 125°C 5
Output low (sink) current IOL 4.2 mA VO = 1.5 V, VIN = 15 V, VDD = 15 V, TA = -55°C 5
Output low (sink) current IOL 4 mA VO = 1.5 V, VIN = 15 V, VDD = 15 V, TA = -40°C 5
Output low (sink) current IOL 3.4 6.8 mA VO = 1.5 V, VIN = 15 V, VDD = 15 V, TA = 25°C 5
Output low (sink) current IOL 2.8 mA VO = 1.5 V, VIN = 15 V, VDD = 15 V, TA = 85°C 5
Output low (sink) current IOL 2.4 mA VO = 1.5 V, VIN = 15 V, VDD = 15 V, TA = 125°C 5
Input low voltage VIL 1 V VO = 4.5 V, VDD = 5 V, all temperatures 6
Input low voltage VIL 2 V VO = 9 V, VDD = 10 V, all temperatures 6
Input low voltage VIL 2.5 V VO = 13.5 V, VDD = 15 V, all temperatures 6
Input high voltage VIH 4 V VO = 0.5 V, VDD = 5 V, all temperatures 6
Input high voltage VIH 8 V VO = 1 V, VDD = 10 V, all temperatures 6
Input high voltage VIH 12.5 V VO = 1.5 V, VDD = 15 V, all temperatures 6
Junction-to-ambient thermal resistance RθJA 91.2 °C/W NS (SO) package, 14 pins 4

CAD (KiCad official)

  • Symbol: CD4069UBNSR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14-208mil (KiCad packages3D, STEP)
  • 3D model files: cd4069ubnsr-etched.step / cd4069ubnsr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4069ubnsr.step / cd4069ubnsr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 f15ea92547b91f1c, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF