component

CD4069UBM96

Public Made by Adom

by adom

Texas Instruments Inverters, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs cd4069ubm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
cd4069ubm96-etched.fit.json cd4069ubm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4069ubm96-etched.glb cd4069ubm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4069ubm96-etched.step cd4069ubm96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4069ubm96.glb Publish 0.1.0 · Ray
cd4069ubm96.kicad_mod Publish 0.1.0 · Ray
cd4069ubm96.kicad_sym Publish 0.1.0 · Ray
cd4069ubm96.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
cd4069ubm96.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json cd4069ubm96: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md cd4069ubm96: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

CD4069UBM96

Texas Instruments · Inverters · SOIC-14

CD4069UBM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Inverter 1 input (A). CMOS logic input; VIH >= 4 V at VDD = 5 V, VIL <= 1 V at VDD = 5 V. Input current typically 10 pA, max 1 uA over full range.
2 G output Inverter 1 output (G = NOT A). CMOS push-pull output; VOH >= 4.95 V and VOL <= 0.05 V at VDD = 5 V. Sources/sinks ~0.5-1 mA at VDD = 5 V.
3 B input Inverter 2 input (B). CMOS logic input; high-input-impedance CMOS gate with typical 10 pA input leakage.
4 H output Inverter 2 output (H = NOT B). CMOS push-pull output. Standard B-series CMOS drive levels.
5 C input Inverter 3 input (C). CMOS logic input.
6 I output Inverter 3 output (I = NOT C). CMOS push-pull output.
7 VSS power_in Negative supply (ground). Reference terminal for VDD (3 V to 18 V recommended; 20 V absolute max).
8 J output Inverter 4 output (J = NOT D). CMOS push-pull output.
9 D input Inverter 4 input (D). CMOS logic input.
10 K output Inverter 5 output (K = NOT E). CMOS push-pull output.
11 E input Inverter 5 input (E). CMOS logic input.
12 L output Inverter 6 output (L = NOT F). CMOS push-pull output.
13 F input Inverter 6 input (F). CMOS logic input.
14 VDD power_in Positive supply. Recommended 3 V to 18 V; absolute maximum 20 V referenced to VSS. Bypass with a local ceramic decoupling capacitor to VSS.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • CD4069UBM96
  • CD4069UBE
  • CD4069UBF
  • CD4069UBNSR
  • CD4069UBPW

CAD (KiCad official)

  • Symbol: CD4069UBM96
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: cd4069ubm96-etched.step / cd4069ubm96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4069ubm96.step / cd4069ubm96.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
cd4069ubm96.step 195 KB You want the bare part, or you mark your own boards.
cd4069ubm96-etched.step 3.0 MB You want the part with CD4069UBM96 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 714 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 a31d78e1b358ef16, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF