component

CD4069BM

Public Made by Adom

by adom

lingxingic Inverters, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogiccd4069bmfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

CD4069BM

lingxingic · Inverters · SOP-14

CD4069BM from lingxingic, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input of inverter 1; unused inputs must be connected to VDD, VSS or another input.
2 1Y output Data output of inverter 1, the logic inverse of 1A (H input gives L output, L input gives H output).
3 2A input Data input of inverter 2; unused inputs must be connected to VDD, VSS or another input.
4 2Y output Data output of inverter 2, the logic inverse of 2A.
5 3A input Data input of inverter 3; unused inputs must be connected to VDD, VSS or another input.
6 3Y output Data output of inverter 3, the logic inverse of 3A.
7 VSS power_in Ground reference, 0 V.
8 4Y output Data output of inverter 4, the logic inverse of 4A.
9 4A input Data input of inverter 4; unused inputs must be connected to VDD, VSS or another input.
10 5Y output Data output of inverter 5, the logic inverse of 5A.
11 5A input Data input of inverter 5; unused inputs must be connected to VDD, VSS or another input.
12 6Y output Data output of inverter 6, the logic inverse of 6A.
13 6A input Data input of inverter 6; unused inputs must be connected to VDD, VSS or another input.
14 VDD power_in Positive supply voltage, recommended 3 V to 15 V; absolute maximum 18 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD4069BM
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: cd4069bm-etched.step / cd4069bm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4069bm.step / cd4069bm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (13 pp, sha256 3d8ed570efd4e066, retrieved 2026-10-09, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF