# CD4068BM

**Texas Instruments** · Logic Gates · SOIC-14

CD4068BM from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | output | Buffered AND output, K = A·B·C·D·E·F·G·H. |
| 2 | A | input | Buffered gate input A, protected by CMOS protection network, input voltage -0.5V to VDD+0.5V. |
| 3 | B | input | Buffered gate input B, protected by CMOS protection network, input voltage -0.5V to VDD+0.5V. |
| 4 | C | input | Buffered gate input C, protected by CMOS protection network, input voltage -0.5V to VDD+0.5V. |
| 5 | D | input | Buffered gate input D, protected by CMOS protection network, input voltage -0.5V to VDD+0.5V. |
| 6 | NC | unconnected | No connection. |
| 7 | VSS | power_in | Ground/negative supply terminal; all voltages are referenced to VSS. |
| 8 | NC | unconnected | No connection. |
| 9 | E | input | Buffered gate input E, protected by CMOS protection network, input voltage -0.5V to VDD+0.5V. |
| 10 | F | input | Buffered gate input F, protected by CMOS protection network, input voltage -0.5V to VDD+0.5V. |
| 11 | G | input | Buffered gate input G, protected by CMOS protection network, input voltage -0.5V to VDD+0.5V. |
| 12 | H | input | Buffered gate input H, protected by CMOS protection network, input voltage -0.5V to VDD+0.5V. |
| 13 | J | output | Buffered NAND output, J = NOT(A·B·C·D·E·F·G·H). |
| 14 | VDD | power_in | Positive supply, recommended 3V to 18V, absolute maximum -0.5V to +20V referenced to VSS. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `CD4068BM`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `cd4068bm-etched.step` / `cd4068bm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4068bm.step` / `cd4068bm.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd4068b) (20 pp, sha256 `73f5f78780c4b47c`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cd4068bm-datasheet.pdf)