# CD4068BE

**lingxingic** · Logic Gates · DIP-14

CD4068BE from lingxingic, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Y | output | Data output that gives the 8-input AND of inputs A to H, and the output is fully buffered. |
| 2 | A | input | Data input A of the 8-input AND/NAND gate; unused inputs must be connected to VDD, VSS, or another input. |
| 3 | B | input | Data input B of the 8-input AND/NAND gate; unused inputs must be connected to VDD, VSS, or another input. |
| 4 | C | input | Data input C of the 8-input AND/NAND gate; unused inputs must be connected to VDD, VSS, or another input. |
| 5 | D | input | Data input D of the 8-input AND/NAND gate; unused inputs must be connected to VDD, VSS, or another input. |
| 6 | n.c. | unconnected | Not connected. |
| 7 | VSS | power_in | Ground (0 V), the reference for all voltages; the absolute maximum input voltage range is -0.5 V to VDD+0.5 V. |
| 8 | n.c. | unconnected | Not connected. |
| 9 | E | input | Data input E of the 8-input AND/NAND gate; unused inputs must be connected to VDD, VSS, or another input. |
| 10 | F | input | Data input F of the 8-input AND/NAND gate; unused inputs must be connected to VDD, VSS, or another input. |
| 11 | G | input | Data input G of the 8-input AND/NAND gate; unused inputs must be connected to VDD, VSS, or another input. |
| 12 | H | input | Data input H of the 8-input AND/NAND gate; unused inputs must be connected to VDD, VSS, or another input. |
| 13 | Y (complement) | output | Complement data output that gives the 8-input NAND of inputs A to H, and the output is fully buffered. |
| 14 | VDD | power_in | Supply voltage, recommended range 3 V to 15V referenced to VSS. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | DIP-14 |
| Category | Logic |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VDD | 3 |  | 15 | V |  | 6 |
| ambient temperature | Tamb | -40 |  | 125 | ℃ | in free air | 6 |
| supply voltage | VDD | -0.5 |  | 18 | V |  | 6 |
| DC input current | IIK | -10 |  | 10 | mA | any one input | 6 |
| input voltage | VI | -0.5 |  |  | V | all inputs; upper limit printed as VDD+0.5 | 6 |
| storage temperature | Tstg | -65 |  | 150 | ℃ |  | 6 |
| total power dissipation | Ptot |  |  | 500 | mW |  | 6 |
| Soldering temperature | TL |  |  | 245 | ℃ | 10s, DIP | 6 |
| supply current | IDD |  |  | 1 | uA | VIN=0 V, VDD=5 V, Tamb=25℃ | 6 |
| LOW-level output current | IOL | 0.51 | 1 |  | mA | VO=0.4 V, VIN=0 V, VDD=5 V, Tamb=25℃ | 6 |
| LOW-level output current | IOL | 1.3 | 2.6 |  | mA | VO=0.5 V, VIN=0 V, VDD=10 V, Tamb=25℃ | 6 |
| LOW-level output current | IOL | 3.4 | 6.8 |  | mA | VO=1.5 V, VIN=0 V, VDD=15 V, Tamb=25℃ | 6 |
| HIGH-level output current | IOH | -0.51 | -1 |  | mA | VO=4.6 V, VIN=0 V, VDD=5 V, Tamb=25℃ | 6 |
| HIGH-level output current | IOH | -1.6 | -3.2 |  | mA | VO=2.5 V, VIN=0 V, VDD=5 V, Tamb=25℃ | 6 |
| HIGH-level output current | IOH | -1.3 | -2.6 |  | mA | VO=9.5 V, VIN=0 V, VDD=10 V, Tamb=25℃ | 6 |
| HIGH-level output current | IOH | -3.4 | -6.8 |  | mA | VO=13.5 V, VIN=0 V, VDD=15 V, Tamb=25℃ | 6 |
| LOW-level output voltage | VOL |  | 0 | 0.05 | V | VIN=0 V, VDD=5 V, Tamb=25℃ | 6 |
| HIGH-level output voltage | VOH | 4.95 | 5 |  | V | VIN=0 V, VDD=5 V, Tamb=25℃ | 6 |
| HIGH-level output voltage | VOH | 9.95 | 10 |  | V | VIN=0 V, VDD=10 V, Tamb=25℃ | 6 |
| HIGH-level output voltage | VOH | 14.95 | 15 |  | V | VIN=0 V, VDD=15 V, Tamb=25℃ | 6 |
| LOW-level input voltage | VIL |  |  | 1.5 | V | VO=0.5 V / 4.5 V, VDD=5 V, Tamb=25℃ | 6 |
| LOW-level input voltage | VIL |  |  | 3 | V | VO=1 V / 9 V, VDD=10 V, Tamb=25℃ | 6 |
| LOW-level input voltage | VIL |  |  | 4 | V | VO=1.5 V / 13.5 V, VDD=15 V, Tamb=25℃ | 6 |
| HIGH-level input voltage | VIH | 3.5 |  |  | V | VO=0.5 V / 4.5 V, VDD=5 V, Tamb=25℃ | 6 |
| HIGH-level input voltage | VIH | 7 |  |  | V | VO=1 V / 9 V, VDD=10 V, Tamb=25℃ | 6 |
| HIGH-level input voltage | VIH | 11 |  |  | V | VO=1.5 V / 13.5 V, VDD=15 V, Tamb=25℃ | 7 |
| input leakage current | II | -1 |  | 1 | uA | VIN=0 V, VDD=15 V, Tamb=25℃ | 7 |
| supply current | IDD |  |  | 7.5 | uA | VIN=0 V, VDD=5 V, Tamb=+125℃ | 7 |
| supply current | IDD |  |  | 15 | uA | VIN=0 V, VDD=10 V, Tamb=+125℃ | 7 |
| supply current | IDD |  |  | 30 | uA | VIN=0 V, VDD=15 V, Tamb=+125℃ | 7 |
| LOW-level output current | IOL | 0.36 |  |  | mA | VO=0.4 V, VIN=0 V, VDD=5 V, Tamb=+125℃ | 7 |
| LOW-level output current | IOL | 0.9 |  |  | mA | VO=0.5 V, VIN=0 V, VDD=10 V, Tamb=+125℃ | 7 |
| LOW-level output current | IOL | 2.4 |  |  | mA | VO=1.5 V, VIN=0 V, VDD=15 V, Tamb=+125℃ | 7 |
| HIGH-level output current | IOH | -0.36 |  |  | mA | VO=4.6 V, VIN=0 V, VDD=5 V, Tamb=+125℃ | 7 |
| HIGH-level output current | IOH | -1.15 |  |  | mA | VO=2.5 V, VIN=0 V, VDD=5 V, Tamb=+125℃ | 7 |
| HIGH-level output current | IOH | -0.9 |  |  | mA | VO=9.5 V, VIN=0 V, VDD=10 V, Tamb=+125℃ | 7 |
| HIGH-level output current | IOH | -2.4 |  |  | mA | VO=13.5 V, VIN=0 V, VDD=15 V, Tamb=+125℃ | 7 |
| LOW-level output voltage | VOL |  |  | 0.05 | V | VIN=0 V, VDD=5 V, Tamb=+125℃ | 7 |
| HIGH-level output voltage | VOH | 4.95 |  |  | V | VIN=0 V, VDD=5 V, Tamb=+125℃ | 7 |
| HIGH-level output voltage | VOH | 9.95 |  |  | V | VIN=0 V, VDD=10 V, Tamb=+125℃ | 7 |
| HIGH-level output voltage | VOH | 14.95 |  |  | V | VIN=0 V, VDD=15 V, Tamb=+125℃ | 7 |
| LOW-level input voltage | VIL |  |  | 1.5 | V | VO=0.5 V / 4.5 V, VDD=5 V, Tamb=+125℃ | 7 |
| LOW-level input voltage | VIL |  |  | 3 | V | VO=1 V / 9 V, VDD=10 V, Tamb=+125℃ | 7 |
| LOW-level input voltage | VIL |  |  | 4 | V | VO=1.5 V / 13.5 V, VDD=15 V, Tamb=+125℃ | 7 |
| HIGH-level input voltage | VIH | 3.5 |  |  | V | VO=0.5 V / 4.5 V, VDD=5 V, Tamb=+125℃ | 7 |
| HIGH-level input voltage | VIH | 7 |  |  | V | VO=1 V / 9 V, VDD=10 V, Tamb=+125℃ | 7 |
| propagation delay time | tPHL, tPLH |  | 150 | 300 | ns | see Figure 4, VDD=5 V, Tamb=25℃, tr/tf=20 ns, CL=50 pF, RL=200 kΩ | 7 |
| propagation delay time | tPHL, tPLH |  | 75 | 150 | ns | see Figure 4, VDD=10 V, Tamb=25℃, tr/tf=20 ns, CL=50 pF, RL=200 kΩ | 7 |
| propagation delay time | tPHL, tPLH |  | 55 | 110 | ns | see Figure 4, VDD=15 V, Tamb=25℃, tr/tf=20 ns, CL=50 pF, RL=200 kΩ | 7 |
| transition time | tTHL, tTLH |  | 100 | 200 | ns | see Figure 4, VDD=5 V, Tamb=25℃, tr/tf=20 ns, CL=50 pF, RL=200 kΩ | 7 |
| transition time | tTHL, tTLH |  | 50 | 100 | ns | see Figure 4, VDD=10 V, Tamb=25℃, tr/tf=20 ns, CL=50 pF, RL=200 kΩ | 7 |
| transition time | tTHL, tTLH |  | 40 | 80 | ns | see Figure 4, VDD=15 V, Tamb=25℃, tr/tf=20 ns, CL=50 pF, RL=200 kΩ | 7 |
| input capacitance | CI |  | 5 | 7.5 | pF | any input, Tamb=25℃, VSS=0 V | 7 |

## CAD (KiCad official)

- Symbol: `CD4068BE`
- Footprint: `Package_DIP:DIP-14_W7.62mm`
- 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files: `cd4068be-etched.step` / `cd4068be-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4068be.step` / `cd4068be.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [lingxingic datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603388678584881152) (12 pp, sha256 `bd0186e1a9ad63e3`, retrieved 2026-10-15, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cd4068be-datasheet.pdf)