component
CD4066BE
Public Made by Adomby adom
Texas Instruments Analog Switches, Multiplexers, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CD4066BE
Texas Instruments · Analog Switches, Multiplexers · PDIP-14
CD4066BE from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SIG A IN/OUT | bidirectional | Input/output terminal for bilateral switch A; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 2 | SIG A OUT/IN | bidirectional | Output/input terminal for bilateral switch A; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 3 | SIG B OUT/IN | bidirectional | Output/input terminal for bilateral switch B; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 4 | SIG B IN/OUT | bidirectional | Input/output terminal for bilateral switch B; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 5 | CONTROL B | input | Control pin for switch B; the address/enable pin voltage must be between 0 V and VDD per the recommended operating conditions. |
| 6 | CONTROL C | input | Control pin for switch C; the address/enable pin voltage must be between 0 V and VDD per the recommended operating conditions. |
| 7 | VSS | power_in | Low voltage power pin; VDD and VSS must satisfy 3 V ≤ (VDD - VSS) ≤ 24 V with the minimum VDD met. |
| 8 | SIG C IN/OUT | bidirectional | Input/output terminal for bilateral switch C; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 9 | SIG C OUT/IN | bidirectional | Output/input terminal for bilateral switch C; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 10 | SIG D OUT/IN | bidirectional | Output/input terminal for bilateral switch D; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 11 | SIG D IN/OUT | bidirectional | Input/output terminal for bilateral switch D; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 12 | CONTROL D | input | Control pin for switch D; the address/enable pin voltage must be between 0 V and VDD per the recommended operating conditions. |
| 13 | CONTROL A | input | Control pin for switch A; the address/enable pin voltage must be between 0 V and VDD per the recommended operating conditions. |
| 14 | VDD | power_in | Positive power supply pin; VDD and VSS must satisfy 3 V ≤ (VDD - VSS) ≤ 24 V with the minimum VDD met. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-14 |
| Category | Interface |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage differential | VDD, VSS | 20 | V | 4 | |||
| Positive supply voltage | VDD | -0.5 | 20 | V | 4 | ||
| Negative supply voltage | VSS | -20 | 0.5 | V | 4 | ||
| Logic control input pin current (EN, Ax, SELx) | ISEL or IEN | -30 | 30 | mA | 4 | ||
| Source or drain continuous current (Sx, D) | IS or ID (CONT) | -20 | 20 | mA | 4 | ||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Power supply voltage differential | VDD, VSS | 3 | 18 | V | 4 | ||
| Positive power supply voltage | VDD | 3 | 18 | V | 4 | ||
| Source or drain continuous current (Sx, D) | IS or ID (CONT) | -10 | 10 | mA | 4 | ||
| Ambient temperature | TA | -55 | 125 | °C | 4 | ||
| On-state resistance difference between any two switches | ΔRON | 15 | Ω | RL = 10kΩ, VC = VDD, VDD = 5V | 5 | ||
| On-state resistance difference between any two switches | ΔRON | 10 | Ω | RL = 10kΩ, VC = VDD, VDD = 10V | 5 | ||
| On-state resistance difference between any two switches | ΔRON | 5 | Ω | RL = 10kΩ, VC = VDD, VDD = 15V | 5 | ||
| Control input, high voltage | VIHC | 3.5 | V | VDD = 5V | 5 | ||
| Control input, high voltage | VIHC | 7 | V | VDD = 10V | 5 | ||
| Control input, high voltage | VIHC | 11 | V | VDD = 15V | 5 | ||
| Input capacitance | CIN | 5 | 7.5 | pF | 6 | ||
| Quiescent Device Current | IDD | 5 | µA | All switches OFF, Vis = 0 to 5V, VDD = 5V, TA = -55°C | 7 | ||
| Quiescent Device Current | IDD | 4 | 6 | µA | All switches OFF, Vis = 0 to 5V, VDD = 5V, TA = 25°C | 7 | |
| Quiescent Device Current | IDD | 7 | µA | All switches OFF, Vis = 0 to 5V, VDD = 5V, TA = 85°C | 7 | ||
| Quiescent Device Current | IDD | 7.5 | µA | All switches OFF, Vis = 0 to 5V, VDD = 5V, TA = 125°C | 7 | ||
| Quiescent Device Current | IDD | 6 | µA | All switches OFF, Vis = 0 to 10V, VDD = 10V, TA = -55°C | 7 | ||
| Quiescent Device Current | IDD | 5 | 7 | µA | All switches OFF, Vis = 0 to 10V, VDD = 10V, TA = 25°C | 7 | |
| Quiescent Device Current | IDD | 8 | µA | All switches OFF, Vis = 0 to 10V, VDD = 10V, TA = 85°C | 7 | ||
| Quiescent Device Current | IDD | 9 | µA | All switches OFF, Vis = 0 to 10V, VDD = 10V, TA = 125°C | 7 | ||
| Quiescent Device Current | IDD | 5.5 | 8 | µA | All switches OFF, Vis = 0 to 15V, VDD = 15V, TA = 25°C | 7 | |
| Quiescent Device Current | IDD | 10 | µA | All switches OFF, Vis = 0 to 15V, VDD = 15V, TA = 125°C | 7 | ||
| Quiescent Device Current | IDD | 8.5 | µA | All switches OFF, Vis = 0 to 20V, VDD = 20V, TA = -55°C | 7 | ||
| Quiescent Device Current | IDD | 6.5 | 9 | µA | All switches OFF, Vis = 0 to 20V, VDD = 20V, TA = 25°C | 7 | |
| Quiescent Device Current | IDD | 11 | µA | All switches OFF, Vis = 0 to 20V, VDD = 20V, TA = 125°C | 7 | ||
| ON Resistance rON Max | rON | 800 | Ω | VDD = 5V, TA = -55°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 | ||
| ON Resistance rON Max | rON | 850 | Ω | VDD = 5V, TA = -40°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 | ||
| ON Resistance rON Max | rON | 470 | 1050 | Ω | VDD = 5V, TA = 25°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 | |
| ON Resistance rON Max | rON | 1200 | Ω | VDD = 5V, TA = 85°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 | ||
| ON Resistance rON Max | rON | 1300 | Ω | VDD = 5V, TA = 125°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 | ||
| ON Resistance rON Max | rON | 310 | Ω | VDD = 10V, TA = -55°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 | ||
| ON Resistance rON Max | rON | 330 | Ω | VDD = 10V, TA = -40°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 | ||
| ON Resistance rON Max | rON | 180 | 400 | Ω | VDD = 10V, TA = 25°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 | |
| ON Resistance rON Max | rON | 500 | Ω | VDD = 10V, TA = 85°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 | ||
| ON Resistance rON Max | rON | 200 | Ω | VDD = 15V, TA = -55°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 | ||
| ON Resistance rON Max | rON | 210 | Ω | VDD = 15V, TA = -40°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 | ||
| ON Resistance rON Max | rON | 125 | 240 | Ω | VDD = 15V, TA = 25°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 | |
| ON Resistance rON Max | rON | 300 | Ω | VDD = 15V, TA = 85°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 | ||
| ON Resistance rON Max | rON | 320 | Ω | VDD = 15V, TA = 125°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 | ||
| Thermal resistance, junction-to-ambient (N PDIP, 14 pins) | RθJA | 93.7 | °C/W | 5 | |||
| Thermal resistance, junction-to-case top (N PDIP, 14 pins) | RθJC(top) | 72.5 | °C/W | 5 | |||
| Thermal resistance, junction-to-board (N PDIP, 14 pins) | RθJB | 68 | °C/W | 5 | |||
| Junction-to-top characterization parameter (N PDIP, 14 pins) | ΨJT | 50.3 | °C/W | 5 | |||
| Junction-to-board characterization parameter (N PDIP, 14 pins) | ΨJB | 67.3 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
CD4066BE - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files:
cd4066be-etched.step/cd4066be-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4066be.step/cd4066be.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (36 pp, sha256
2866836ca96460d4, retrieved 2026-10-26, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD4066BE
**Texas Instruments** · Analog Switches, Multiplexers · PDIP-14
CD4066BE from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SIG A IN/OUT | bidirectional | Input/output terminal for bilateral switch A; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 2 | SIG A OUT/IN | bidirectional | Output/input terminal for bilateral switch A; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 3 | SIG B OUT/IN | bidirectional | Output/input terminal for bilateral switch B; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 4 | SIG B IN/OUT | bidirectional | Input/output terminal for bilateral switch B; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 5 | CONTROL B | input | Control pin for switch B; the address/enable pin voltage must be between 0 V and VDD per the recommended operating conditions. |
| 6 | CONTROL C | input | Control pin for switch C; the address/enable pin voltage must be between 0 V and VDD per the recommended operating conditions. |
| 7 | VSS | power_in | Low voltage power pin; VDD and VSS must satisfy 3 V ≤ (VDD - VSS) ≤ 24 V with the minimum VDD met. |
| 8 | SIG C IN/OUT | bidirectional | Input/output terminal for bilateral switch C; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 9 | SIG C OUT/IN | bidirectional | Output/input terminal for bilateral switch C; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 10 | SIG D OUT/IN | bidirectional | Output/input terminal for bilateral switch D; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 11 | SIG D IN/OUT | bidirectional | Input/output terminal for bilateral switch D; the signal voltage must stay between VSS and VDD per the recommended operating conditions. |
| 12 | CONTROL D | input | Control pin for switch D; the address/enable pin voltage must be between 0 V and VDD per the recommended operating conditions. |
| 13 | CONTROL A | input | Control pin for switch A; the address/enable pin voltage must be between 0 V and VDD per the recommended operating conditions. |
| 14 | VDD | power_in | Positive power supply pin; VDD and VSS must satisfy 3 V ≤ (VDD - VSS) ≤ 24 V with the minimum VDD met. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-14 |
| Category | Interface |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage differential | VDD, VSS | | | 20 | V | | 4 |
| Positive supply voltage | VDD | -0.5 | | 20 | V | | 4 |
| Negative supply voltage | VSS | -20 | | 0.5 | V | | 4 |
| Logic control input pin current (EN, Ax, SELx) | ISEL or IEN | -30 | | 30 | mA | | 4 |
| Source or drain continuous current (Sx, D) | IS or ID (CONT) | -20 | | 20 | mA | | 4 |
| Junction temperature | TJ | | | 150 | °C | | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| Power supply voltage differential | VDD, VSS | 3 | | 18 | V | | 4 |
| Positive power supply voltage | VDD | 3 | | 18 | V | | 4 |
| Source or drain continuous current (Sx, D) | IS or ID (CONT) | -10 | | 10 | mA | | 4 |
| Ambient temperature | TA | -55 | | 125 | °C | | 4 |
| On-state resistance difference between any two switches | ΔRON | | | 15 | Ω | RL = 10kΩ, VC = VDD, VDD = 5V | 5 |
| On-state resistance difference between any two switches | ΔRON | | | 10 | Ω | RL = 10kΩ, VC = VDD, VDD = 10V | 5 |
| On-state resistance difference between any two switches | ΔRON | | | 5 | Ω | RL = 10kΩ, VC = VDD, VDD = 15V | 5 |
| Control input, high voltage | VIHC | 3.5 | | | V | VDD = 5V | 5 |
| Control input, high voltage | VIHC | 7 | | | V | VDD = 10V | 5 |
| Control input, high voltage | VIHC | 11 | | | V | VDD = 15V | 5 |
| Input capacitance | CIN | | 5 | 7.5 | pF | | 6 |
| Quiescent Device Current | IDD | | | 5 | µA | All switches OFF, Vis = 0 to 5V, VDD = 5V, TA = -55°C | 7 |
| Quiescent Device Current | IDD | | 4 | 6 | µA | All switches OFF, Vis = 0 to 5V, VDD = 5V, TA = 25°C | 7 |
| Quiescent Device Current | IDD | | | 7 | µA | All switches OFF, Vis = 0 to 5V, VDD = 5V, TA = 85°C | 7 |
| Quiescent Device Current | IDD | | | 7.5 | µA | All switches OFF, Vis = 0 to 5V, VDD = 5V, TA = 125°C | 7 |
| Quiescent Device Current | IDD | | | 6 | µA | All switches OFF, Vis = 0 to 10V, VDD = 10V, TA = -55°C | 7 |
| Quiescent Device Current | IDD | | 5 | 7 | µA | All switches OFF, Vis = 0 to 10V, VDD = 10V, TA = 25°C | 7 |
| Quiescent Device Current | IDD | | | 8 | µA | All switches OFF, Vis = 0 to 10V, VDD = 10V, TA = 85°C | 7 |
| Quiescent Device Current | IDD | | | 9 | µA | All switches OFF, Vis = 0 to 10V, VDD = 10V, TA = 125°C | 7 |
| Quiescent Device Current | IDD | | 5.5 | 8 | µA | All switches OFF, Vis = 0 to 15V, VDD = 15V, TA = 25°C | 7 |
| Quiescent Device Current | IDD | | | 10 | µA | All switches OFF, Vis = 0 to 15V, VDD = 15V, TA = 125°C | 7 |
| Quiescent Device Current | IDD | | | 8.5 | µA | All switches OFF, Vis = 0 to 20V, VDD = 20V, TA = -55°C | 7 |
| Quiescent Device Current | IDD | | 6.5 | 9 | µA | All switches OFF, Vis = 0 to 20V, VDD = 20V, TA = 25°C | 7 |
| Quiescent Device Current | IDD | | | 11 | µA | All switches OFF, Vis = 0 to 20V, VDD = 20V, TA = 125°C | 7 |
| ON Resistance rON Max | rON | | | 800 | Ω | VDD = 5V, TA = -55°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 |
| ON Resistance rON Max | rON | | | 850 | Ω | VDD = 5V, TA = -40°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 |
| ON Resistance rON Max | rON | | 470 | 1050 | Ω | VDD = 5V, TA = 25°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 |
| ON Resistance rON Max | rON | | | 1200 | Ω | VDD = 5V, TA = 85°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 |
| ON Resistance rON Max | rON | | | 1300 | Ω | VDD = 5V, TA = 125°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 |
| ON Resistance rON Max | rON | | | 310 | Ω | VDD = 10V, TA = -55°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 |
| ON Resistance rON Max | rON | | | 330 | Ω | VDD = 10V, TA = -40°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 |
| ON Resistance rON Max | rON | | 180 | 400 | Ω | VDD = 10V, TA = 25°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 |
| ON Resistance rON Max | rON | | | 500 | Ω | VDD = 10V, TA = 85°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 |
| ON Resistance rON Max | rON | | | 200 | Ω | VDD = 15V, TA = -55°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 |
| ON Resistance rON Max | rON | | | 210 | Ω | VDD = 15V, TA = -40°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 |
| ON Resistance rON Max | rON | | 125 | 240 | Ω | VDD = 15V, TA = 25°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 |
| ON Resistance rON Max | rON | | | 300 | Ω | VDD = 15V, TA = 85°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 |
| ON Resistance rON Max | rON | | | 320 | Ω | VDD = 15V, TA = 125°C, (VDD+VSS)/2, VC = VDD, RL = 10kΩ, Vis = VSS to VDD | 7 |
| Thermal resistance, junction-to-ambient (N PDIP, 14 pins) | RθJA | | 93.7 | | °C/W | | 5 |
| Thermal resistance, junction-to-case top (N PDIP, 14 pins) | RθJC(top) | | 72.5 | | °C/W | | 5 |
| Thermal resistance, junction-to-board (N PDIP, 14 pins) | RθJB | | 68 | | °C/W | | 5 |
| Junction-to-top characterization parameter (N PDIP, 14 pins) | ΨJT | | 50.3 | | °C/W | | 5 |
| Junction-to-board characterization parameter (N PDIP, 14 pins) | ΨJB | | 67.3 | | °C/W | | 5 |
## CAD (KiCad official)
- Symbol: `CD4066BE`
- Footprint: `Package_DIP:DIP-14_W7.62mm`
- 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files: `cd4066be-etched.step` / `cd4066be-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4066be.step` / `cd4066be.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd4066b) (36 pp, sha256 `2866836ca96460d4`, retrieved 2026-10-26, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `off` (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd4066be-datasheet.pdf)