component
CD4060SA.TR
Public Made by Adomby adom
Wuxi I core Elec Counters, Dividers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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CD4060SA.TR
Wuxi I core Elec · Counters, Dividers · SOIC-16
CD4060SA.TR from Wuxi I core Elec, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q11 | output | Buffered counter output Q11. |
| 2 | Q12 | output | Buffered counter output Q12. |
| 3 | Q13 | output | Buffered counter output Q13. |
| 4 | Q5 | output | Buffered counter output Q5. |
| 5 | Q4 | output | Buffered counter output Q4. |
| 6 | Q6 | output | Buffered counter output Q6. |
| 7 | Q3 | output | Buffered counter output Q3. |
| 8 | VSS | power_in | Ground (0V), the reference for all voltages. |
| 9 | CEXT | passive | External capacitor connection for the RC oscillator. |
| 10 | REXT | passive | Oscillator pin for the external resistor in RC oscillator circuits. |
| 11 | RS | input | Clock input/oscillator pin; the counter advances on the negative-going transition of RS. |
| 12 | MR | input | Asynchronous master reset; a HIGH level resets the counter outputs LOW independent of other inputs. |
| 13 | Q8 | output | Buffered counter output Q8. |
| 14 | Q7 | output | Buffered counter output Q7. |
| 15 | Q9 | output | Buffered counter output Q9. |
| 16 | VDD | power_in | Supply voltage, recommended range 3V to 15V referenced to VSS (absolute maximum +18V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Wuxi I core Elec |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VDD | -0.5 | 18 | V | 6 | ||
| DC input current | IIK | -10 | 10 | mA | any one input | 6 | |
| input voltage | VI | -0.5 | V | all inputs | 6 | ||
| storage temperature | Tstg | -65 | 150 | ℃ | 6 | ||
| total power dissipation | Ptot | 500 | mW | 6 | |||
| device dissipation per output transistor | P | 100 | mW | 6 | |||
| soldering temperature (SOP) | TL | 250 | ℃ | 10s | 6 | ||
| supply voltage | VDD | 3 | 15 | V | 6 | ||
| ambient temperature | Tamb | -40 | 85 | ℃ | in free air | 6 | |
| input pulse width | tw | 100 | ns | f=100kHz; VDD=5V | 6 | ||
| input pulse width | tw | 40 | ns | f=100kHz; VDD=10V | 6 | ||
| input pulse width | tw | 30 | ns | f=100kHz; VDD=15V | 6 | ||
| input pulse frequency | fRS | 3.5 | MHz | external pulse source; VDD=5V | 6 | ||
| input pulse frequency | fRS | 8 | MHz | external pulse source; VDD=10V | 6 | ||
| input pulse frequency | fRS | 12 | MHz | external pulse source; VDD=15V | 6 | ||
| reset pulse width | twR | 120 | ns | VDD=5V | 6 | ||
| reset pulse width | twR | 60 | ns | VDD=10V | 6 | ||
| reset pulse width | twR | 40 | ns | VDD=15V | 6 | ||
| supply current (Tamb=25℃) | IDD | 0.04 | 5 | uA | VIN 0, 5 V; VDD 5 V | 7 | |
| supply current (Tamb=25℃) | IDD | 0.04 | 10 | uA | VIN 0, 10 V; VDD 10 V | 7 | |
| supply current (Tamb=25℃) | IDD | 0.04 | 20 | uA | VIN 0, 15 V; VDD 15 V | 7 | |
| LOW-level output current (Tamb=25℃) | IOL | 0.51 | 1 | mA | VO 0.4 V; VIN 0, 5 V; VDD 5 V | 7 | |
| LOW-level output current (Tamb=25℃) | IOL | 1.3 | 2.6 | mA | VO 0.5 V; VIN 0, 10 V; VDD 10 V | 7 | |
| LOW-level output current (Tamb=25℃) | IOL | 3.4 | 6.8 | mA | VO 1.5 V; VIN 0, 15 V; VDD 15 V | 7 | |
| HIGH-level output current (Tamb=25℃) | IOH | -0.51 | -1 | mA | VO 4.6 V; VIN 0, 5 V; VDD 5 V | 7 | |
| HIGH-level output current (Tamb=25℃) | IOH | -1.6 | -3.2 | mA | VO 2.5 V; VIN 0, 5 V; VDD 5 V | 7 | |
| HIGH-level output current (Tamb=25℃) | IOH | -1.3 | -2.6 | mA | VO 9.5 V; VIN 0, 10 V; VDD 10 V | 7 | |
| HIGH-level output current (Tamb=25℃) | IOH | -3.4 | -6.8 | mA | VO 13.5 V; VIN 0, 15 V; VDD 15 V | 7 | |
| LOW-level output voltage (Tamb=25℃) | VOL | 0 | 0.05 | V | VIN 0, 5 V; VDD 5 V | 7 | |
| HIGH-level output voltage (Tamb=25℃) | VOH | 4.95 | 5 | V | VIN 0, 5 V; VDD 5 V | 7 | |
| HIGH-level output voltage (Tamb=25℃) | VOH | 9.95 | 10 | V | VIN 0, 10 V; VDD 10 V | 7 | |
| HIGH-level output voltage (Tamb=25℃) | VOH | 14.95 | 15 | V | VIN 0, 15 V; VDD 15 V | 7 | |
| LOW-level input voltage (Tamb=25℃) | VIL | 1.5 | V | VO 0.5, 4.5 V; VDD 5 V | 7 | ||
| LOW-level input voltage (Tamb=25℃) | VIL | 3 | V | VO 1, 9 V; VDD 10 V | 7 | ||
| LOW-level input voltage (Tamb=25℃) | VIL | 4 | V | VO 1.5, 13.5 V; VDD 15 V | 7 | ||
| HIGH-level input voltage (Tamb=25℃) | VIH | 3.5 | V | VO 0.5, 4.5 V; VDD 5 V | 7 | ||
| HIGH-level input voltage (Tamb=25℃) | VIH | 7 | V | VO 1, 9 V; VDD 10 V | 7 | ||
| HIGH-level input voltage (Tamb=25℃) | VIH | 11 | V | VO 1.5, 13.5 V; VDD 15 V | 7 | ||
| input leakage current (Tamb=25℃) | II | -0.1 | 0.1 | uA | VIN 0, 15 V; VDD 15 V | 7 | |
| supply current (Tamb=-40℃) | IDD | 5 | uA | Tamb=-40℃; VIN 0, 5 V; VDD 5 V | 7 | ||
| supply current (Tamb=-40℃) | IDD | 10 | uA | Tamb=-40℃; VIN 0, 10 V; VDD 10 V | 7 | ||
| supply current (Tamb=-40℃) | IDD | 20 | uA | Tamb=-40℃; VIN 0, 15 V; VDD 15 V | 7 | ||
| supply current (Tamb=+85℃) | IDD | 150 | uA | Tamb=+85℃; VIN 0, 5 V; VDD 5 V | 8 | ||
| supply current (Tamb=+85℃) | IDD | 300 | uA | Tamb=+85℃; VIN 0, 10 V; VDD 10 V | 8 | ||
| maximum clock frequency | fmax | 3.5 | 7 | MHz | input RS; see Figure 4; VDD=5V | 8 | |
| maximum clock frequency | fmax | 8 | 16 | MHz | input RS; see Figure 4; VDD=10V | 8 | |
| maximum clock frequency | fmax | 12 | 24 | MHz | input RS; see Figure 4; VDD=15V | 8 | |
| propagation delay time (RS to Q3) | tPHL, tPLH | 370 | 740 | ns | RS to Q3 out; see Figure 4; VDD=5V | 8 | |
| propagation delay time (RS to Q3) | tPHL, tPLH | 150 | 300 | ns | RS to Q3 out; see Figure 4; VDD=10V | 8 | |
| propagation delay time (RS to Q3) | tPHL, tPLH | 100 | 200 | ns | RS to Q3 out; see Figure 4; VDD=15V | 8 | |
| maximum oscillator frequency | fosc | 530 | 650 | 810 | kHz | CX=15pF; RS=30kΩ; RX=15kΩ; VDD=10V | 9 |
| maximum oscillator frequency | fosc | 690 | 800 | 940 | kHz | CX=15pF; RS=30kΩ; RX=15kΩ; VDD=15V | 9 |
| input capacitance | CI | 5 | 7.5 | pF | any input | 8 | |
| minimum pulse width RS HIGH | tW | 50 | 100 | ns | f=100kHz; RS HIGH; VDD=5V | 8 | |
| minimum pulse width RS HIGH | tW | 20 | 40 | ns | f=100kHz; RS HIGH; VDD=10V | 8 | |
| minimum pulse width RS HIGH | tW | 15 | 30 | ns | f=100kHz; RS HIGH; VDD=15V | 8 |
CAD (KiCad official)
- Symbol:
CD4060SA.TR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
cd4060sa-tr-etched.step/cd4060sa-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4060sa-tr.step/cd4060sa-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Wuxi I core Elec datasheet (14 pp, sha256
9da10c692685b29e, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).