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CD4060BMT

Public Made by Adom

by adom

HGSEMI Counters / Dividers, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs cd4060bmt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers cd4060bmt: viewers · Ray
cd4060bmt-etched.fit.json cd4060bmt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4060bmt-etched.glb cd4060bmt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4060bmt-etched.step cd4060bmt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd4060bmt.glb Publish 0.1.0 · Ray
cd4060bmt.kicad_mod Publish 0.1.0 · Ray
cd4060bmt.kicad_sym Publish 0.1.0 · Ray
cd4060bmt.lbr Publish 0.1.0 · Ray
cd4060bmt.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json cd4060bmt: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md cd4060bmt: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

CD4060BMT

HGSEMI · Counters / Dividers · TSSOP-16

CD4060BMT from HGSEMI, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Q12 output Buffered counter output, stage 12 (divide by 4096).
2 Q13 output Buffered counter output, stage 13 (divide by 8192).
3 Q14 output Buffered counter output, stage 14 (divide by 16384).
4 Q6 output Buffered counter output, stage 6 (divide by 64).
5 Q5 output Buffered counter output, stage 5 (divide by 32).
6 Q7 output Buffered counter output, stage 7 (divide by 128).
7 Q4 output Buffered counter output, stage 4 (divide by 16).
8 VSS power_in Ground / negative supply reference (0 V).
9 PHI2 output Oscillator output PHI2 (buffered oscillator waveform for external RC/crystal network).
10 PHI1 output Oscillator output PHI1; connects to the external timing network.
11 PHI0 input Oscillator input PHI0 (external clock input or feedback node for the internal RC/crystal oscillator).
12 MR input Master reset, active high. Asynchronously clears all counter stages to zero and disables the oscillator while held high.
13 Q9 output Buffered counter output, stage 9 (divide by 512).
14 Q8 output Buffered counter output, stage 8 (divide by 256).
15 Q10 output Buffered counter output, stage 10 (divide by 1024).
16 VDD power_in Positive supply voltage, typically 3 V to 18 V for CD4000B-series CMOS.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package TSSOP-16
Category Logic
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • CD4060BMT
  • CD4060BMTPT
  • CD4060BMTPWT

CAD (KiCad official)

  • Symbol: CD4060BMT
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: cd4060bmt-etched.step / cd4060bmt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4060bmt.step / cd4060bmt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (10 pp, sha256 a7261cab2fab8294, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF