main
Ray cd4060bdtr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) bddb16f
{
  "schema_version": 1,
  "type": "component",
  "slug": "cd4060bdtr",
  "title": "CD4060BDTR",
  "brief": "XBLW Counters / Dividers, SOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "cd4060bdtr"
  ],
  "component": {
    "mpn": "CD4060BDTR",
    "manufacturer": "XBLW",
    "package": "SOP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Counters / Dividers",
    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2310191804_XBLW-CD4060BDTR-XBLW_C18723493.pdf",
    "parts": {
      "symbol": "cd4060bdtr.kicad_sym",
      "footprint": "cd4060bdtr.kicad_mod",
      "model_3d": "cd4060bdtr-etched.glb",
      "model_3d_plain": "cd4060bdtr.glb",
      "model_3d_step": "cd4060bdtr-etched.step",
      "model_3d_step_plain": "cd4060bdtr.step",
      "lbr": "cd4060bdtr.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "Q11",
        "type": "output",
        "description": "Buffered output of counter stage 12 (divide-by-4096). CMOS output, VDD swing."
      },
      {
        "number": "2",
        "name": "Q12",
        "type": "output",
        "description": "Buffered output of counter stage 13 (divide-by-8192). CMOS output, VDD swing."
      },
      {
        "number": "3",
        "name": "Q13",
        "type": "output",
        "description": "Buffered output of counter stage 14 (divide-by-16384). CMOS output, VDD swing."
      },
      {
        "number": "4",
        "name": "Q9",
        "type": "output",
        "description": "Buffered output of counter stage 10 (divide-by-1024). CMOS output, VDD swing."
      },
      {
        "number": "5",
        "name": "Q8",
        "type": "output",
        "description": "Buffered output of counter stage 9 (divide-by-512). CMOS output, VDD swing."
      },
      {
        "number": "6",
        "name": "Q7",
        "type": "output",
        "description": "Buffered output of counter stage 8 (divide-by-256). CMOS output, VDD swing."
      },
      {
        "number": "7",
        "name": "Q5",
        "type": "output",
        "description": "Buffered output of counter stage 6 (divide-by-64). CMOS output, VDD swing."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference (0 V)."
      },
      {
        "number": "9",
        "name": "RS",
        "type": "output",
        "description": "Oscillator RC network connection (reset/feedback node between external RS and CTC of the RC oscillator)."
      },
      {
        "number": "10",
        "name": "RTC",
        "type": "input",
        "description": "Oscillator RC timing input node (RTC / external clock input when oscillator is not used)."
      },
      {
        "number": "11",
        "name": "CTC",
        "type": "passive",
        "description": "Oscillator timing capacitor connection (CTC)."
      },
      {
        "number": "12",
        "name": "RESET",
        "type": "input",
        "description": "Master reset input. A logic HIGH clears all counter stages and disables the oscillator; must be held LOW for normal counting."
      },
      {
        "number": "13",
        "name": "Q6",
        "type": "output",
        "description": "Buffered output of counter stage 7 (divide-by-128). CMOS output, VDD swing."
      },
      {
        "number": "14",
        "name": "Q4",
        "type": "output",
        "description": "Buffered output of counter stage 5 (divide-by-32). CMOS output, VDD swing."
      },
      {
        "number": "15",
        "name": "Q3",
        "type": "output",
        "description": "Buffered output of counter stage 4 (divide-by-16). CMOS output, VDD swing."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply voltage. Operating range 3 V to 18 V."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2310191804_XBLW-CD4060BDTR-XBLW_C18723493.pdf",
        "pages": 15,
        "sha256": "fc074a4a0bd1cffe",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -4.445
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "CD4060",
      "logic_family": "CD4000",
      "function_code": "4060",
      "function_class": "Counter",
      "function_name": "14-Stage Binary Counter with On-Chip Oscillator",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "cd4060bdtr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          9.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4060bdtr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          9.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "d537d76c95896383cccaf595707bc82dcc9f7217a0dc3969c8252d8cd6d60586",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "XBLW",
      "Package": "SOP-16",
      "Category": "Logic",
      "Pins": "16"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cd4060bdtr"
  ],
  "discovery_pitch": "CD4060BDTR (XBLW) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4060bdtr.kicad_sym",
    "cd4060bdtr.kicad_mod",
    "cd4060bdtr.glb",
    "cd4060bdtr.step",
    "cd4060bdtr-etched.step",
    "cd4060bdtr.lbr",
    "docs/hero.png",
    "docs/cd4060bdtr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "CD4060BDTR",
      "kind": "packaging"
    },
    {
      "mpn": "CD4060BDTRD",
      "kind": "packaging"
    },
    {
      "mpn": "CD4060BDTRPW",
      "kind": "packaging"
    },
    {
      "mpn": "CD4060BDTRPWR",
      "kind": "packaging"
    },
    {
      "mpn": "CD4060BDTRN",
      "kind": "packaging"
    },
    {
      "mpn": "CD4060BDTRE",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-24T18:44:07.491Z"
}