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CD4060BDRG
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HANSCHIP semiconductor Counters, Dividers, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CD4060BDRG
HANSCHIP semiconductor · Counters, Dividers · SOP-16
CD4060BDRG from HANSCHIP semiconductor, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q12 | output | Counter bit 12 output. |
| 2 | Q13 | output | Counter bit 13 output. |
| 3 | Q14 | output | Counter bit 14 output. |
| 4 | Q6 | output | Counter bit 6 output. |
| 5 | Q5 | output | Counter bit 5 output. |
| 6 | Q7 | output | Counter bit 7 output. |
| 7 | Q4 | output | Counter bit 4 output. |
| 8 | VSS | power_in | Ground (0 V reference). |
| 9 | ΦO | output | Oscillator driver output 1, used with external RC or crystal circuitry. |
| 10 | ΦO̅ | output | Oscillator driver output 2, used with external RC or crystal circuitry. |
| 11 | ΦI | input | Oscillator driver input; counter state changes on the falling edge of ΦI, with max input pulse frequency typically 7 MHz at 5 V, 16 MHz at 10 V, 24 MHz at 15 V. |
| 12 | RESET | input | Active-high reset; a high level resets the counter to 0000H and disables the oscillator. |
| 13 | Q9 | output | Counter bit 9 output. |
| 14 | Q8 | output | Counter bit 8 output. |
| 15 | Q10 | output | Counter bit 10 output. |
| 16 | VDD | power_in | Positive supply, recommended 2.0 V to 20 V (absolute maximum 20 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SOP-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 20 | V | GND=0V | 4 | |
| Input current | Iik | 10 | mA | Vo<-0.5V or Vo>VCC+0.5V | 4 | ||
| Storage temperature | Tstg | -65 | 150 | ℃ | 4 | ||
| Power dissipation (SOP) | Ptot | 500 | mW | SOP package | 4 | ||
| Soldering temperature | TL | 245 | ℃ | 10 s, SOP | 4 | ||
| Supply voltage | VCC | 2 | 5 | 20 | V | 4 | |
| Input voltage | VI | 0 | V | maximum printed as VCC | 4 | ||
| Output voltage | Vo | 0 | V | maximum printed as VCC | 4 | ||
| Operating ambient temperature | Tamb | -40 | 85 | ℃ | 4 | ||
| Input rise and fall time | Δt/ΔV | 625 | ns/V | Vcc=2.0V | 4 | ||
| Input rise and fall time | Δt/ΔV | 1.67 | 139 | ns/V | Vcc=4.5V | 4 | |
| Input rise and fall time | Δt/ΔV | 83 | ns/V | Vcc=6.0V | 4 | ||
| Quiescent supply current | IDD | 0.04 | 5 | uA | VIN=0,5V; VDD=5V | 5 | |
| Quiescent supply current | IDD | 0.04 | 10 | uA | VIN=0,10V; VDD=10V | 5 | |
| Quiescent supply current | IDD | 0.04 | 20 | uA | VIN=0,15V; VDD=15V | 5 | |
| Quiescent supply current | IDD | 0.08 | 100 | uA | VIN=0,20V; VDD=20V | 5 | |
| Output low current | IOL | 0.51 | 1 | mA | VO=0.4V; VIN=0,5V; VDD=5V | 5 | |
| Output low current | IOL | 1.3 | 2.6 | mA | VO=0.5V; VIN=0,10V; VDD=10V | 5 | |
| Output low current | IOL | 3.4 | 6.8 | mA | VO=1.5V; VIN=0,15V; VDD=15V | 5 | |
| Output high current | IOH | -0.51 | -1 | mA | VO=4.6V; VIN=0,5V; VDD=5V | 5 | |
| Output high current | IOH | -1.6 | -3.2 | mA | VO=2.5V; VIN=0,5V; VDD=5V | 5 | |
| Output high current | IOH | -1.3 | -2.6 | mA | VO=9.5V; VIN=0,10V; VDD=10V | 5 | |
| Output high current | IOH | -3.4 | -6.8 | mA | VO=13.5V; VIN=0,15V; VDD=15V | 5 | |
| Output low voltage | VOL | 0 | 0.05 | V | VIN=0,5V; VDD=5V | 5 | |
| Output high voltage | VOH | 4.95 | 5 | V | VIN=0,5V; VDD=5V | 5 | |
| Output high voltage | VOH | 9.95 | 10 | V | VIN=0,10V; VDD=10V | 5 | |
| Output high voltage | VOH | 14.95 | 15 | V | VIN=0,15V; VDD=15V | 5 | |
| Input low voltage | VIL | 1.5 | V | VO=0.5,4.5V; VDD=5V | 5 | ||
| Input low voltage | VIL | 3 | V | VO=1,9V; VDD=10V | 5 | ||
| Input low voltage | VIL | 4 | V | VO=1.5,13.5V; VDD=15V | 5 | ||
| Input high voltage | VOH | 3.5 | V | VO=0.5,4.5V; VDD=5V | 5 | ||
| Input high voltage | VOH | 7 | V | VO=1,9V; VDD=10V | 5 | ||
| Input high voltage | VOH | 11 | V | VO=1.5,13.5V; VDD=15V | 5 | ||
| Propagation delay ΦI to Q4 | tPHL,tPLH | 370 | 740 | ns | VDD=5V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 | |
| Propagation delay ΦI to Q4 | tPHL,tPLH | 150 | 300 | ns | VDD=10V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 | |
| Propagation delay ΦI to Q4 | tPHL,tPLH | 100 | 200 | ns | VDD=15V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 | |
| Propagation delay Qn to Qn+1 | tPHL,tPLH | 100 | 200 | ns | VDD=5V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 | |
| Propagation delay Qn to Qn+1 | tPHL,tPLH | 50 | 100 | ns | VDD=10V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 | |
| Propagation delay Qn to Qn+1 | tPHL,tPLH | 40 | 80 | ns | VDD=15V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 | |
| Transition time | tTHL,tTLH | 100 | 200 | ns | VDD=5V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 | |
| Transition time | tTHL,tTLH | 50 | 100 | ns | VDD=10V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 | |
| Transition time | tTHL,tTLH | 40 | 80 | ns | VDD=15V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 | |
| Minimum input pulse width | tW | 50 | 100 | ns | VDD=5V; f=100KHz | 6 | |
| Minimum input pulse width | tW | 20 | 40 | ns | VDD=10V; f=100KHz | 6 | |
| Minimum input pulse width | tW | 15 | 30 | ns | VDD=15V; f=100KHz | 6 | |
| Maximum input pulse frequency | fΦI | 3.5 | 7 | MHz | VDD=5V | 6 | |
| Maximum input pulse frequency | fΦI | 8 | 16 | MHz | VDD=10V | 6 | |
| Maximum input pulse frequency | fΦI | 12 | 24 | MHz | VDD=15V | 6 | |
| RC oscillator output frequency tolerance | F | -10 | 10 | % | VDD=5V; CX=200pF; RS=560KΩ; RX=50Ω | 6 | |
| RC oscillator output frequency (nominal) | F | 23 | VDD=5V; CX=200pF; RS=560KΩ; RX=50Ω | 6 | |||
| RC oscillator output frequency (nominal) | F | 24 | VDD=10V; CX=200pF; RS=560KΩ; RX=50Ω | 6 | |||
| RC oscillator output frequency (nominal) | F | 25 | VDD=15V; CX=200pF; RS=560KΩ; RX=50Ω | 6 |
CAD (KiCad official)
- Symbol:
CD4060BDRG - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
cd4060bdrg-etched.step/cd4060bdrg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4060bdrg.step/cd4060bdrg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HANSCHIP semiconductor datasheet (10 pp, sha256
41fe68771417cb01, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD4060BDRG
**HANSCHIP semiconductor** · Counters, Dividers · SOP-16
CD4060BDRG from HANSCHIP semiconductor, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q12 | output | Counter bit 12 output. |
| 2 | Q13 | output | Counter bit 13 output. |
| 3 | Q14 | output | Counter bit 14 output. |
| 4 | Q6 | output | Counter bit 6 output. |
| 5 | Q5 | output | Counter bit 5 output. |
| 6 | Q7 | output | Counter bit 7 output. |
| 7 | Q4 | output | Counter bit 4 output. |
| 8 | VSS | power_in | Ground (0 V reference). |
| 9 | ΦO | output | Oscillator driver output 1, used with external RC or crystal circuitry. |
| 10 | ΦO̅ | output | Oscillator driver output 2, used with external RC or crystal circuitry. |
| 11 | ΦI | input | Oscillator driver input; counter state changes on the falling edge of ΦI, with max input pulse frequency typically 7 MHz at 5 V, 16 MHz at 10 V, 24 MHz at 15 V. |
| 12 | RESET | input | Active-high reset; a high level resets the counter to 0000H and disables the oscillator. |
| 13 | Q9 | output | Counter bit 9 output. |
| 14 | Q8 | output | Counter bit 8 output. |
| 15 | Q10 | output | Counter bit 10 output. |
| 16 | VDD | power_in | Positive supply, recommended 2.0 V to 20 V (absolute maximum 20 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SOP-16 |
| Category | Logic |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | | 20 | V | GND=0V | 4 |
| Input current | Iik | | | 10 | mA | Vo<-0.5V or Vo>VCC+0.5V | 4 |
| Storage temperature | Tstg | -65 | | 150 | ℃ | | 4 |
| Power dissipation (SOP) | Ptot | | | 500 | mW | SOP package | 4 |
| Soldering temperature | TL | | | 245 | ℃ | 10 s, SOP | 4 |
| Supply voltage | VCC | 2 | 5 | 20 | V | | 4 |
| Input voltage | VI | 0 | | | V | maximum printed as VCC | 4 |
| Output voltage | Vo | 0 | | | V | maximum printed as VCC | 4 |
| Operating ambient temperature | Tamb | -40 | | 85 | ℃ | | 4 |
| Input rise and fall time | Δt/ΔV | | | 625 | ns/V | Vcc=2.0V | 4 |
| Input rise and fall time | Δt/ΔV | | 1.67 | 139 | ns/V | Vcc=4.5V | 4 |
| Input rise and fall time | Δt/ΔV | | | 83 | ns/V | Vcc=6.0V | 4 |
| Quiescent supply current | IDD | | 0.04 | 5 | uA | VIN=0,5V; VDD=5V | 5 |
| Quiescent supply current | IDD | | 0.04 | 10 | uA | VIN=0,10V; VDD=10V | 5 |
| Quiescent supply current | IDD | | 0.04 | 20 | uA | VIN=0,15V; VDD=15V | 5 |
| Quiescent supply current | IDD | | 0.08 | 100 | uA | VIN=0,20V; VDD=20V | 5 |
| Output low current | IOL | 0.51 | 1 | | mA | VO=0.4V; VIN=0,5V; VDD=5V | 5 |
| Output low current | IOL | 1.3 | 2.6 | | mA | VO=0.5V; VIN=0,10V; VDD=10V | 5 |
| Output low current | IOL | 3.4 | 6.8 | | mA | VO=1.5V; VIN=0,15V; VDD=15V | 5 |
| Output high current | IOH | -0.51 | -1 | | mA | VO=4.6V; VIN=0,5V; VDD=5V | 5 |
| Output high current | IOH | -1.6 | -3.2 | | mA | VO=2.5V; VIN=0,5V; VDD=5V | 5 |
| Output high current | IOH | -1.3 | -2.6 | | mA | VO=9.5V; VIN=0,10V; VDD=10V | 5 |
| Output high current | IOH | -3.4 | -6.8 | | mA | VO=13.5V; VIN=0,15V; VDD=15V | 5 |
| Output low voltage | VOL | | 0 | 0.05 | V | VIN=0,5V; VDD=5V | 5 |
| Output high voltage | VOH | 4.95 | 5 | | V | VIN=0,5V; VDD=5V | 5 |
| Output high voltage | VOH | 9.95 | 10 | | V | VIN=0,10V; VDD=10V | 5 |
| Output high voltage | VOH | 14.95 | 15 | | V | VIN=0,15V; VDD=15V | 5 |
| Input low voltage | VIL | | | 1.5 | V | VO=0.5,4.5V; VDD=5V | 5 |
| Input low voltage | VIL | | | 3 | V | VO=1,9V; VDD=10V | 5 |
| Input low voltage | VIL | | | 4 | V | VO=1.5,13.5V; VDD=15V | 5 |
| Input high voltage | VOH | 3.5 | | | V | VO=0.5,4.5V; VDD=5V | 5 |
| Input high voltage | VOH | 7 | | | V | VO=1,9V; VDD=10V | 5 |
| Input high voltage | VOH | 11 | | | V | VO=1.5,13.5V; VDD=15V | 5 |
| Propagation delay ΦI to Q4 | tPHL,tPLH | | 370 | 740 | ns | VDD=5V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 |
| Propagation delay ΦI to Q4 | tPHL,tPLH | | 150 | 300 | ns | VDD=10V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 |
| Propagation delay ΦI to Q4 | tPHL,tPLH | | 100 | 200 | ns | VDD=15V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 |
| Propagation delay Qn to Qn+1 | tPHL,tPLH | | 100 | 200 | ns | VDD=5V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 |
| Propagation delay Qn to Qn+1 | tPHL,tPLH | | 50 | 100 | ns | VDD=10V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 |
| Propagation delay Qn to Qn+1 | tPHL,tPLH | | 40 | 80 | ns | VDD=15V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 |
| Transition time | tTHL,tTLH | | 100 | 200 | ns | VDD=5V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 |
| Transition time | tTHL,tTLH | | 50 | 100 | ns | VDD=10V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 |
| Transition time | tTHL,tTLH | | 40 | 80 | ns | VDD=15V; tr=tf=20ns; CL=50pF; RL=200KΩ | 6 |
| Minimum input pulse width | tW | | 50 | 100 | ns | VDD=5V; f=100KHz | 6 |
| Minimum input pulse width | tW | | 20 | 40 | ns | VDD=10V; f=100KHz | 6 |
| Minimum input pulse width | tW | | 15 | 30 | ns | VDD=15V; f=100KHz | 6 |
| Maximum input pulse frequency | fΦI | 3.5 | 7 | | MHz | VDD=5V | 6 |
| Maximum input pulse frequency | fΦI | 8 | 16 | | MHz | VDD=10V | 6 |
| Maximum input pulse frequency | fΦI | 12 | 24 | | MHz | VDD=15V | 6 |
| RC oscillator output frequency tolerance | F | -10 | | 10 | % | VDD=5V; CX=200pF; RS=560KΩ; RX=50Ω | 6 |
| RC oscillator output frequency (nominal) | F | | 23 | | | VDD=5V; CX=200pF; RS=560KΩ; RX=50Ω | 6 |
| RC oscillator output frequency (nominal) | F | | 24 | | | VDD=10V; CX=200pF; RS=560KΩ; RX=50Ω | 6 |
| RC oscillator output frequency (nominal) | F | | 25 | | | VDD=15V; CX=200pF; RS=560KΩ; RX=50Ω | 6 |
## CAD (KiCad official)
- Symbol: `CD4060BDRG`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files: `cd4060bdrg-etched.step` / `cd4060bdrg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4060bdrg.step` / `cd4060bdrg.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HANSCHIP semiconductor datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8756595113592406016) (10 pp, sha256 `41fe68771417cb01`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd4060bdrg-datasheet.pdf)