component
CD4053BDTR
Public Made by Adomby adom
XBLW Analog Switches, Multiplexers, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4053BDTR
XBLW · Analog Switches, Multiplexers · SOP-16
CD4053BDTR from XBLW, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 2Y1 | bidirectional | Independent input or output of switch 2 (channel 1), connected to 2Z when selected. |
| 2 | 2Y0 | bidirectional | Independent input or output of switch 2 (channel 0), connected to 2Z when selected. |
| 3 | 3Y1 | bidirectional | Independent input or output of switch 3 (channel 1), connected to 3Z when selected. |
| 4 | 3Z | bidirectional | Common output or input of switch 3, swinging between VDD and VEE. |
| 5 | 3Y0 | bidirectional | Independent input or output of switch 3 (channel 0), connected to 3Z when selected. |
| 6 | E̅ | input | Enable input, active LOW; a HIGH makes all switches high-impedance OFF regardless of Sn. |
| 7 | VEE | power_in | Negative supply voltage for the switches (analog negative limit); connected to VSS for digital multiplexer use, and VDD-VEE may not exceed 9V. |
| 8 | VSS | power_in | Ground (0V), supply connection for the digital control inputs; VDD to VSS range is 3V to 9V. |
| 9 | S3 | input | Select input for switch 3. |
| 10 | S2 | input | Select input for switch 2. |
| 11 | S1 | input | Select input for switch 1. |
| 12 | 1Y0 | bidirectional | Independent input or output of switch 1 (channel 0), connected to 1Z when selected. |
| 13 | 1Y1 | bidirectional | Independent input or output of switch 1 (channel 1), connected to 1Z when selected. |
| 14 | 1Z | bidirectional | Common output or input of switch 1, swinging between VDD and VEE. |
| 15 | 2Z | bidirectional | Common output or input of switch 2, swinging between VDD and VEE. |
| 16 | VDD | power_in | Positive supply voltage; VDD to VSS range is 3V to 9V and VDD-VEE may not exceed 9V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XBLW |
| Package | SOP-16 |
| Category | Interface |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD4053BDTR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
cd4053bdtr-etched.step/cd4053bdtr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4053bdtr.step/cd4053bdtr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XBLW datasheet (16 pp, sha256
2784132a19157ff2, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).