component

CD4052B

Public Made by Adom

by adom

TI dual 4-channel analog mux/demux, SOIC-16. Two 4:1 switches, 2-bit select, INH, VEE for bipolar. Datasheet-verified.

componentmultiplexeranalog-switchmux4052soic-16texas-instruments
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

CD4052B

Texas Instruments · Dual 4-channel analog mux / demux · SOIC-16

A dual 4-channel analog multiplexer/demultiplexer in SOIC-16, part of the CD4051/4052/4053 family. It contains two independent 4-to-1 switches (the X group and the Y group) that share one 2-bit address (A, B), so it routes a differential or stereo pair: address 0-3 connects X_COM to one of X0-X3 and Y_COM to the matching Y0-Y3, bidirectionally. A shared inhibit (INH) opens all switches, and a separate VEE lets it pass bipolar signals below ground. Use it to switch between four stereo sources, scan differential sensors, or steer a signal pair. Runs 3-18 V (VDD).

Pinout

Pin Name Type Function
1 Y0 bidirectional Y-section channel 0 analog input/output. Connected to Y COM (pin 3) when A=0, B=0 and INH=0.
2 Y2 bidirectional Y-section channel 2 analog input/output. Connected to Y COM (pin 3) when A=0, B=1 and INH=0.
3 Y_COM bidirectional Y common out/in. Bidirectional common terminal of the Y-section 4:1 analog multiplexer, routed to one of Y0-Y3 based on the A/B address when INH=0.
4 Y3 bidirectional Y-section channel 3 analog input/output. Connected to Y COM (pin 3) when A=1, B=1 and INH=0.
5 Y1 bidirectional Y-section channel 1 analog input/output. Connected to Y COM (pin 3) when A=1, B=0 and INH=0.
6 INH input Inhibit input (active high). When INH=1 (VDD), all channels are disabled (both X and Y sections turned OFF). Logic levels: 0=VSS, 1=VDD. VIH,min = 3.5V at VDD=5V; VIL,max = 0.8V at VDD=5V.
7 VEE power_in Negative analog supply. Sets the lower rail of the analog signal swing (analog signals may swing from VEE to VDD). Typically tied to VSS for single-supply operation or to a negative rail for bipolar analog signals. VDD-VEE ≤ 20V.
8 VSS power_in Digital ground / logic reference. Digital-control input logic levels are: 0 = VSS, 1 = VDD.
9 B input Channel select address bit B (MSB of 2-bit address). Together with A, selects one of four channels (0-3) in both the X and Y sections simultaneously. Logic levels: 0=VSS, 1=VDD.
10 A input Channel select address bit A (LSB of 2-bit address). Together with B, selects one of four channels (0-3) in both the X and Y sections simultaneously. Logic levels: 0=VSS, 1=VDD.
11 X3 bidirectional X-section channel 3 analog input/output. Connected to X COM (pin 13) when A=1, B=1 and INH=0.
12 X0 bidirectional X-section channel 0 analog input/output. Connected to X COM (pin 13) when A=0, B=0 and INH=0.
13 X_COM bidirectional X common in/out. Bidirectional common terminal of the X-section 4:1 analog multiplexer, routed to one of X0-X3 based on the A/B address when INH=0.
14 X1 bidirectional X-section channel 1 analog input/output. Connected to X COM (pin 13) when A=1, B=0 and INH=0.
15 X2 bidirectional X-section channel 2 analog input/output. Connected to X COM (pin 13) when A=0, B=1 and INH=0.
16 VDD power_in Positive supply input. Operating range 3V to 20V (VDD referenced to VSS). Sets the upper rail for both the analog signal swing and the digital-control logic HIGH level. Absolute max VDD-VEE = 20V.

Key specifications

Parameter Value
Type Dual 4-channel analog mux/demux
Switches 2 x 4:1 (X and Y groups), bidirectional
Control shared 2-bit address (A/B) + INH
Signal range bipolar (VDD to VEE)
Supply (VDD) 3-18 V
On-resistance ~125 Ω typ at 15 V
Family CD4051/4052/4053
Package SOIC-16

Ordering variants

Same part, different packaging or reel option.

  • CD4052BM96 (SOIC-16)
  • CD4052BE (PDIP-16)

CAD (KiCad official)

  • Symbol: Analog_Switch:CD4052B
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D)
  • 3D model files: cd4052b-etched.step / cd4052b-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4052b.step / cd4052b.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (39 pp, sha256 45b7f1be0f490337, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF