component
CD4051S
Public Made by Adomby adom
GR Analog Switches, Multiplexers, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 16d ago |
| viewers | 16d ago |
| cd4051s-etched.glb | 16d ago |
| cd4051s-etched.step | 16d ago |
| cd4051s-hero.glb | 16d ago |
| cd4051s-hero.overlay.json | 16d ago |
| cd4051s.glb | 16d ago |
| cd4051s.kicad_mod | 16d ago |
| cd4051s.kicad_sym | 16d ago |
| cd4051s.lbr | 16d ago |
| cd4051s.step | 16d ago |
| package.json | 16d ago |
| page.json | 16d ago |
| README.md | 16d ago |
CD4051S
GR · Analog Switches, Multiplexers · SOP-16
CD4051S from GR, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 4 | passive | Analog channel 4 terminal of the 8-channel switch, selected when C-B-A = 100 and INH is low; analog range 0 to VDD-VEE. |
| 2 | 6 | passive | Analog channel 6 terminal of the 8-channel switch, selected when C-B-A = 110 and INH is low; analog range 0 to VDD-VEE. |
| 3 | COM | bidirectional | Common analog output/input terminal connected to whichever channel is selected; analog range 0 to VDD-VEE. |
| 4 | 7 | passive | Analog channel 7 terminal of the 8-channel switch, selected when C-B-A = 111 and INH is low; analog range 0 to VDD-VEE. |
| 5 | 5 | passive | Analog channel 5 terminal of the 8-channel switch, selected when C-B-A = 101 and INH is low; analog range 0 to VDD-VEE. |
| 6 | INH | input | Inhibit (enable control) input; when INH = VDD all channels are turned off, and recommended control input range is 0 to VDD-VSS. |
| 7 | VEE | power_in | Analog switch negative supply; recommended VDD-VEE is 0 V to 15 V and the absolute maximum VDD-VEE is 18 V. |
| 8 | VSS | power_in | Digital/power ground reference for the control inputs; recommended VDD-VSS is 3 V to 15 V and the absolute maximum DC supply VDD-VSS is -0.5 V to 18 V. |
| 9 | C | input | Binary channel select input (most significant bit of the channel address); control input range 0 to VDD-VSS. |
| 10 | B | input | Binary channel select input (middle bit of the channel address); control input range 0 to VDD-VSS. |
| 11 | A | input | Binary channel select input (least significant bit of the channel address); control input range 0 to VDD-VSS. |
| 12 | 3 | passive | Analog channel 3 terminal of the 8-channel switch, selected when C-B-A = 011 and INH is low; analog range 0 to VDD-VEE. |
| 13 | 0 | passive | Analog channel 0 terminal of the 8-channel switch, selected when C-B-A = 000 and INH is low; analog range 0 to VDD-VEE. |
| 14 | 1 | passive | Analog channel 1 terminal of the 8-channel switch, selected when C-B-A = 001 and INH is low; analog range 0 to VDD-VEE. |
| 15 | 2 | passive | Analog channel 2 terminal of the 8-channel switch, selected when C-B-A = 010 and INH is low; analog range 0 to VDD-VEE. |
| 16 | VDD | power_in | Positive digital supply; recommended VDD-VSS is 3 V to 15 V and the absolute maximum DC supply VDD-VSS is -0.5 V to 18 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GR |
| Package | SOP-16 |
| Category | Interface |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC supply voltage | VDD-VSS | -0.5 | 18 | V | 2 | ||
| Analog supply voltage | VDD-VEE | 18 | V | 2 | |||
| Power dissipation | PD | 500 | mW | 2 | |||
| Operating temperature | TA | 0 | 70 | ℃ | 2 | ||
| Storage temperature | TS | -65 | 150 | ℃ | 2 | ||
| Lead soldering temperature | TW | 260 | ℃ | 10 s | 2 | ||
| DC supply voltage | VDD-VSS | 3 | 15 | V | 3 | ||
| Control input voltage | VIS | 0 | V | upper limit printed as VDD-VSS | 3 | ||
| Analog supply voltage | VDD-VEE | 0 | 15 | V | 3 | ||
| Analog input/output voltage | VIN, VOUT | 0 | V | upper limit printed as VDD-VEE | 3 | ||
| Operating temperature | TA | 0 | 60 | ℃ | 3 | ||
| High-level input voltage | VIH | 3.5 | V | VDD=5 V; VIH=VDD through 1k; VEE=VSS; RL=1kΩ to VSS; IIS<2uA on all OFF channels | 3 | ||
| High-level input voltage | VIH | 7 | V | VDD=10 V; VIH=VDD through 1k; VEE=VSS; RL=1kΩ to VSS; IIS<2uA on all OFF channels | 3 | ||
| High-level input voltage | VIH | 11 | V | VDD=15 V; VIH=VDD through 1k; VEE=VSS; RL=1kΩ to VSS; IIS<2uA on all OFF channels | 3 | ||
| Low-level input voltage | VIL | 1.5 | V | VDD=5 V; VIL=VDD through 1k | 3 | ||
| Low-level input voltage | VIL | 3 | V | VDD=10 V; VIL=VDD through 1k | 3 | ||
| Low-level input voltage | VIL | 4 | V | VDD=15 V; VIL=VDD through 1k | 3 | ||
| Channel OFF leakage current | IOFF | -100 | 100 | nA | Input/output channels OFF, INH=VDD; VDD=18 V | 3 | |
| Input current | IIN | -0.1 | 0.01 | 0.1 | uA | VIN=VDD or VSS; VDD=18 V | 3 |
| Quiescent supply current | IDD | 0.01 | 5 | uA | VIN=VDD or VSS; VDD=5 V | 3 | |
| Quiescent supply current | IDD | 0.01 | 10 | uA | VIN=VDD or VSS; VDD=10 V | 3 | |
| Quiescent supply current | IDD | 0.01 | 20 | uA | VIN=VDD or VSS; VDD=15 V | 3 |
CAD (KiCad official)
- Symbol:
CD4051S - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
cd4051s-etched.step/cd4051s-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4051s.step/cd4051s.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GR datasheet (5 pp, sha256
38e00dfdf9db8270, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).