# CD4051BDTR

**XBLW** · Analog Switches, Multiplexers · SOP-16

CD4051BDTR from XBLW, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Y4 | passive | Independent analog input or output of switch 4. |
| 2 | Y6 | passive | Independent analog input or output of switch 6. |
| 3 | Z | passive | Common analog output or input, shared by all eight switches. |
| 4 | Y7 | passive | Independent analog input or output of switch 7. |
| 5 | Y5 | passive | Independent analog input or output of switch 5. |
| 6 | E̅ | input | Enable input, active LOW; when HIGH all switches are in the high-impedance OFF-state regardless of S1 to S3. |
| 7 | VEE | power_in | Negative supply voltage for the analog switches; connected to VSS for digital multiplexer operation, and VDD-VEE may not exceed 9V. |
| 8 | VSS | power_in | Ground (0V); supply connection for the digital control inputs (S1 to S3 and E). |
| 9 | S3 | input | Select (address) input 3, selects one of the eight switches when E is LOW. |
| 10 | S2 | input | Select (address) input 2, selects one of the eight switches when E is LOW. |
| 11 | S1 | input | Select (address) input 1, selects one of the eight switches when E is LOW. |
| 12 | Y3 | passive | Independent analog input or output of switch 3. |
| 13 | Y0 | passive | Independent analog input or output of switch 0. |
| 14 | Y1 | passive | Independent analog input or output of switch 1. |
| 15 | Y2 | passive | Independent analog input or output of switch 2. |
| 16 | VDD | power_in | Positive supply voltage; VDD to VSS range is 3V to 9V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | XBLW |
| Package | SOP-16 |
| Category | Interface |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `CD4051BDTR`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files: `cd4051bdtr-etched.step` / `cd4051bdtr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4051bdtr.step` / `cd4051bdtr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [XBLW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590910699105705984) (17 pp, sha256 `6887810bba008392`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cd4051bdtr-datasheet.pdf)