Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

CD4051BDRG

HANSCHIP semiconductor · Analog Switches, Multiplexers · SOP-16

CD4051BDRG from HANSCHIP semiconductor, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Y4 bidirectional Input/output channel Y4; connects to common port Z when E is low and address inputs select channel 4.
2 Y6 bidirectional Input/output channel Y6; connects to common port Z when E is low and address inputs select channel 6.
3 Z bidirectional Common input/output port; selectively connects to one of Y0-Y7 based on address inputs A0-A2 when enable E is low.
4 Y7 bidirectional Input/output channel Y7; connects to common port Z when E is low and address inputs select channel 7.
5 Y5 bidirectional Input/output channel Y5; connects to common port Z when E is low and address inputs select channel 5.
6 E input Enable input (active low); when low, address inputs A0-A2 select the active channel; when high, all switches are off-state.
7 VEE power_in Negative power supply voltage reference; range -18V to +0.5V relative to VSS.
8 VSS power_in Ground reference for digital control inputs and analog signal common return.
9 A2 input Address select input (most significant bit); together with A1 and A0 selects which Y channel connects to Z when E is low.
10 A1 input Address select input (middle bit); together with A2 and A0 selects which Y channel connects to Z when E is low.
11 A0 input Address select input (least significant bit); together with A2 and A1 selects which Y channel connects to Z when E is low.
12 Y3 bidirectional Input/output channel Y3; connects to common port Z when E is low and address inputs select channel 3.
13 Y0 bidirectional Input/output channel Y0; connects to common port Z when E is low and address inputs select channel 0.
14 Y1 bidirectional Input/output channel Y1; connects to common port Z when E is low and address inputs select channel 1.
15 Y2 bidirectional Input/output channel Y2; connects to common port Z when E is low and address inputs select channel 2.
16 VDD power_in Positive power supply voltage; range 3V to 18V relative to VSS.

Key specifications

Parameter Value
Manufacturer HANSCHIP semiconductor
Package SOP-16
Category Interface
Pins 16

CAD (KiCad official)

  • Symbol: CD4051BDRG
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: cd4051bdrg-etched.step / cd4051bdrg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4051bdrg.step / cd4051bdrg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HANSCHIP semiconductor datasheet (17 pp, sha256 2dc48e395c8369b1, retrieved 2026-09-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF